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Message-ID: <CAE-0n53ty_FPH4pyTrQkUb_RcDXQttvk8CZL0Skh+M6PZunFZg@mail.gmail.com>
Date:   Wed, 7 Sep 2022 19:29:25 -0500
From:   Stephen Boyd <swboyd@...omium.org>
To:     Kuogee Hsieh <quic_khsieh@...cinc.com>, agross@...nel.org,
        airlied@...ux.ie, bjorn.andersson@...aro.org, daniel@...ll.ch,
        dianders@...omium.org, dmitry.baryshkov@...aro.org,
        robdclark@...il.com, sean@...rly.run, vkoul@...nel.org
Cc:     quic_abhinavk@...cinc.com, quic_sbillaka@...cinc.com,
        freedreno@...ts.freedesktop.org, dri-devel@...ts.freedesktop.org,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] drm/msm/dp: cleared DP_DOWNSPREAD_CTRL register before
 start link training

Quoting Kuogee Hsieh (2022-09-07 12:50:37)
> DOWNSPREAD_CTRL (0x107) shall be cleared to 0 upon power-on reset or an
> upstream device disconnect. This patch will enforce this rule by always
> cleared DOWNPREAD_CTRL register to 0 before start link training. At rare

DOWNSPREAD_CTRL

> case that DP MSA timing parameters may be mis-interpreted by the sink
> which causes audio sampling rate be calculated wrongly and cause audio
> did not work at sink if DOWNSPREAD_CTRL register is not cleared to 0.
> This patch also make sure bring sink out of D3 power-down mode into D0
> (normal operation mode) successfully by retrying 3 times.

Split it into two patches? Is 3 times determined by experiment or
purely random?

>
> Changes in v2:
> 1) fix spelling at commit text
> 2) merge ssc variable into encoding[0]
>
> Fixes: 154b5a7da0fd ("drm/msm/dp: add displayPort driver support")
> Signed-off-by: Kuogee Hsieh <quic_khsieh@...cinc.com>
> ---
>  drivers/gpu/drm/msm/dp/dp_ctrl.c | 13 +++++--------
>  drivers/gpu/drm/msm/dp/dp_link.c | 17 +++++++++++------
>  2 files changed, 16 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
> index ab6aa13..1b63220 100644
> --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
> +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
> @@ -1245,8 +1245,7 @@ static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl,
>  {
>         int ret = 0;
>         const u8 *dpcd = ctrl->panel->dpcd;
> -       u8 encoding = DP_SET_ANSI_8B10B;
> -       u8 ssc;
> +       u8 encoding[2] = {0, DP_SET_ANSI_8B10B};

Add space after { and before } please. Also, the 2 isn't necessary as
it's implied.

>         u8 assr;
>         struct dp_link_info link_info = {0};
>
> @@ -1258,13 +1257,11 @@ static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl,
>
>         dp_aux_link_configure(ctrl->aux, &link_info);
>
> -       if (drm_dp_max_downspread(dpcd)) {
> -               ssc = DP_SPREAD_AMP_0_5;
> -               drm_dp_dpcd_write(ctrl->aux, DP_DOWNSPREAD_CTRL, &ssc, 1);
> -       }
> +       if (drm_dp_max_downspread(dpcd))
> +               encoding[0] |= DP_SPREAD_AMP_0_5;
>
> -       drm_dp_dpcd_write(ctrl->aux, DP_MAIN_LINK_CHANNEL_CODING_SET,
> -                               &encoding, 1);
> +       /* config DOWNSPREAD_CTRL and MAIN_LINK_CHANNEL_CODING_SET */
> +       drm_dp_dpcd_write(ctrl->aux, DP_DOWNSPREAD_CTRL, encoding, 2);

Please use ARRAY_SIZE(encoding) instead of '2' here.

>
>         if (drm_dp_alternate_scrambler_reset_cap(dpcd)) {
>                 assr = DP_ALTERNATE_SCRAMBLER_RESET_ENABLE;
> diff --git a/drivers/gpu/drm/msm/dp/dp_link.c b/drivers/gpu/drm/msm/dp/dp_link.c
> index 36f0af0..3ad3826 100644
> --- a/drivers/gpu/drm/msm/dp/dp_link.c
> +++ b/drivers/gpu/drm/msm/dp/dp_link.c
> @@ -49,7 +49,7 @@ static int dp_aux_link_power_up(struct drm_dp_aux *aux,
>                                         struct dp_link_info *link)
>  {
>         u8 value;
> -       int err;
> +       int i, err;
>
>         if (link->revision < 0x11)
>                 return 0;
> @@ -61,11 +61,16 @@ static int dp_aux_link_power_up(struct drm_dp_aux *aux,
>         value &= ~DP_SET_POWER_MASK;
>         value |= DP_SET_POWER_D0;
>
> -       err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
> -       if (err < 0)
> -               return err;
> -
> -       usleep_range(1000, 2000);
> +       /*
> +        * When turning on, we need to retry for 1ms to give the sink
> +        * time to wake up.
> +        */
> +       for (i = 0; i < 3; i++) {
> +               err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);

Can 'err' be ssize_t type? And also renamed to something like
'bytes_written' so that the if condition reads easier?

> +               usleep_range(1000, 2000);
> +               if (err == 1)
> +                       break;
> +       }
>

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