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Message-ID: <20220908070451.3730608-1-horatiu.vultur@microchip.com>
Date: Thu, 8 Sep 2022 09:04:51 +0200
From: Horatiu Vultur <horatiu.vultur@...rochip.com>
To: <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: <claudiu.beznea@...rochip.com>, <nicolas.ferre@...rochip.com>,
<UNGLinuxDriver@...rochip.com>,
Horatiu Vultur <horatiu.vultur@...rochip.com>
Subject: [PATCH] ARM: dts: lan966x: disable aes
Disable AES node on lan966x pcb8290, pcb891 and pcb8309 because these
boards have lan966x that uses secure OS which reserves the AES block.
Therefore it can't be exposed to non-secure world.
Signed-off-by: Horatiu Vultur <horatiu.vultur@...rochip.com>
---
arch/arm/boot/dts/lan966x-pcb8290.dts | 4 ++++
arch/arm/boot/dts/lan966x-pcb8291.dts | 4 ++++
arch/arm/boot/dts/lan966x-pcb8309.dts | 4 ++++
3 files changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/lan966x-pcb8290.dts b/arch/arm/boot/dts/lan966x-pcb8290.dts
index 8a304210653a..2ed53da914ac 100644
--- a/arch/arm/boot/dts/lan966x-pcb8290.dts
+++ b/arch/arm/boot/dts/lan966x-pcb8290.dts
@@ -27,6 +27,10 @@ phy_external_reset: phy_external_reset {
};
};
+&aes {
+ status = "disabled"; /* Reserved by secure OS */
+};
+
&gpio {
miim_a_pins: mdio-pins {
/* MDC, MDIO */
diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts
index 289a31649422..f4f054cdf2a8 100644
--- a/arch/arm/boot/dts/lan966x-pcb8291.dts
+++ b/arch/arm/boot/dts/lan966x-pcb8291.dts
@@ -53,6 +53,10 @@ led-s1-green {
};
};
+&aes {
+ status = "disabled"; /* Reserved by secure OS */
+};
+
&gpio {
fc3_b_pins: fc3-b-pins {
/* RX, TX */
diff --git a/arch/arm/boot/dts/lan966x-pcb8309.dts b/arch/arm/boot/dts/lan966x-pcb8309.dts
index cfd7c8933703..c436cd20d4b4 100644
--- a/arch/arm/boot/dts/lan966x-pcb8309.dts
+++ b/arch/arm/boot/dts/lan966x-pcb8309.dts
@@ -97,6 +97,10 @@ sfp3: sfp3 {
};
};
+&aes {
+ status = "disabled"; /* Reserved by secure OS */
+};
+
&flx3 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
status = "okay";
--
2.33.0
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