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Date:   Thu, 8 Sep 2022 14:04:12 +0300
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     matthew.gerlach@...ux.intel.com
Cc:     hao.wu@...el.com, yilun.xu@...el.com, russell.h.weight@...el.com,
        basheer.ahmed.muddebihal@...el.com, trix@...hat.com,
        mdf@...nel.org, linux-fpga@...r.kernel.org,
        linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
        tianfei.zhang@...el.com, corbet@....net,
        gregkh@...uxfoundation.org, linux-serial@...r.kernel.org,
        jirislaby@...nel.org, geert+renesas@...der.be,
        niklas.soderlund+renesas@...natech.se, phil.edworthy@...esas.com,
        macro@...am.me.uk, johan@...nel.org, lukas@...ner.de
Subject: Re: [PATCH v1 4/5] fpga: dfl: add generic support for MSIX interrupts

On Wed, Sep 07, 2022 at 02:37:32PM -0700, matthew.gerlach@...ux.intel.com wrote:
> On Tue, 6 Sep 2022, Andy Shevchenko wrote:
> > On Tue, Sep 06, 2022 at 12:04:25PM -0700, matthew.gerlach@...ux.intel.com wrote:

...

> > > +	if (fid != FEATURE_ID_AFU && fid != PORT_FEATURE_ID_ERROR &&
> > > +	    fid != PORT_FEATURE_ID_UINT && fid != FME_FEATURE_ID_GLOBAL_ERR) {
> > > +		v = readq(base);
> > > +		v = FIELD_GET(DFH_VERSION, v);
> > > +
> > > +		if (v == 1) {
> > > +			v =  readq(base + DFHv1_CSR_SIZE_GRP);
> > 
> > I am already lost what v keeps...
> > 
> > Perhaps
> > 
> > 		v = readq(base);
> > 		switch (FIELD_GET(DFH_VERSION, v)) {
> > 		case 1:
> > 			...
> > 			break;
> > 		}
> 
> How about?
> 		if (FIELD_GET(DFH_VERSION, readq(base)) == 1) {
> 			...
> 		}

This one tends to be expanded in the future, so I would keep it switch case.

-- 
With Best Regards,
Andy Shevchenko


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