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Message-ID: <2d4de63a-c536-669d-b90d-21f60bc6b6fb@linaro.org>
Date: Thu, 8 Sep 2022 13:07:32 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Richard Acayan <mailingradian@...il.com>,
linux-arm-msm@...r.kernel.org
Cc: andersson@...nel.org, agross@...nel.org,
konrad.dybcio@...ainline.org, mturquette@...libre.com,
sboyd@...nel.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, tdas@...eaurora.org,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
~postmarketos/upstreaming@...ts.sr.ht, caleb@...nolly.tech,
jo@...amily.in
Subject: Re: [PATCH v2 1/3] dt-bindings: clock: gcc-sdm845: add sdm670 global
clocks
On 08/09/2022 00:39, Richard Acayan wrote:
> The Snapdragon 670 clocks will be added into the sdm845 gcc driver. Most
> of the new clocks, GDSCs, and resets already have reserved IDs but there
> are some resources that don't. Add the new clock and extra BCR from
> Snapdragon 670 and document the differences between the SoC parent clocks.
>
> Signed-off-by: Richard Acayan <mailingradian@...il.com>
Thank you for your patch. There is something to discuss/improve.
> '#clock-cells':
> const: 1
> @@ -63,6 +57,46 @@ required:
> - '#reset-cells'
> - '#power-domain-cells'
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: qcom,gcc-sdm845
> + then:
> + properties:
> + clocks:
> + items:
> + - description: Board XO source
> + - description: Board active XO source
> + - description: Sleep clock source
> + - description: PCIE 0 Pipe clock source
> + - description: PCIE 1 Pipe clock source
> + clock-names:
> + items:
> + - const: bi_tcxo
> + - const: bi_tcxo_ao
> + - const: sleep_clk
> + - const: pcie_0_pipe_clk
> + - const: pcie_1_pipe_clk
Blank line here.
With this:
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Best regards,
Krzysztof
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