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Date: Fri, 09 Sep 2022 09:11:16 -0700 From: Tim Chen <tim.c.chen@...ux.intel.com> To: Jiebin Sun <jiebin.sun@...el.com>, akpm@...ux-foundation.org, vasily.averin@...ux.dev, shakeelb@...gle.com, dennis@...nel.org, tj@...nel.org, cl@...ux.com, ebiederm@...ssion.com, legion@...nel.org, manfred@...orfullife.com, alexander.mikhalitsyn@...tuozzo.com, linux-mm@...ck.org, linux-kernel@...r.kernel.org Cc: tim.c.chen@...el.com, feng.tang@...el.com, ying.huang@...el.com, tianyou.li@...el.com, wangyang.guo@...el.com Subject: Re: [PATCH v5 2/2] ipc/msg: mitigate the lock contention with percpu counter On Sat, 2022-09-10 at 04:36 +0800, Jiebin Sun wrote: > The msg_bytes and msg_hdrs atomic counters are frequently > updated when IPC msg queue is in heavy use, causing heavy > cache bounce and overhead. Change them to percpu_counter > greatly improve the performance. Since there is one percpu > struct per namespace, additional memory cost is minimal. > Reading of the count done in msgctl call, which is infrequent. > So the need to sum up the counts in each CPU is infrequent. > > Apply the patch and test the pts/stress-ng-1.4.0 > -- system v message passing (160 threads). > > Score gain: 3.99x > > CPU: ICX 8380 x 2 sockets > Core number: 40 x 2 physical cores > Benchmark: pts/stress-ng-1.4.0 > -- system v message passing (160 threads) Reviewed-by: Tim Chen <tim.c.chen@...ux.intel.com> > > Signed-off-by: Jiebin Sun <jiebin.sun@...el.com> > --- >
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