linux-kernel - Re: [PATCH v4 1/9] PCI/PTM: Cache PTM Capability offset

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Date:   Fri, 9 Sep 2022 16:38:05 -0700
From:   Sathyanarayanan Kuppuswamy 
        <sathyanarayanan.kuppuswamy@...ux.intel.com>
To:     Bjorn Helgaas <helgaas@...nel.org>,
        Kai-Heng Feng <kai.heng.feng@...onical.com>,
        Rajvi Jingar <rajvi.jingar@...ux.intel.com>,
        "Rafael J . Wysocki" <rafael@...nel.org>
Cc:     Koba Ko <koba.ko@...onical.com>,
        Mika Westerberg <mika.westerberg@...ux.intel.com>,
        "David E . Box" <david.e.box@...ux.intel.com>,
        linux-pci@...r.kernel.org, linux-pm@...r.kernel.org,
        linux-kernel@...r.kernel.org, Bjorn Helgaas <bhelgaas@...gle.com>
Subject: Re: [PATCH v4 1/9] PCI/PTM: Cache PTM Capability offset

Hi,

On 9/9/22 1:24 PM, Bjorn Helgaas wrote:
> From: Bjorn Helgaas <bhelgaas@...gle.com>
> 
> Cache the PTM Capability offset instead of searching for it every time we
> enable/disable PTM or save/restore PTM state.  No functional change
> intended.
> 
> Signed-off-by: Bjorn Helgaas <bhelgaas@...gle.com>

Looks good to me.

Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@...ux.intel.com>

> ---
>  drivers/pci/pcie/ptm.c | 41 +++++++++++++++++------------------------
>  include/linux/pci.h    |  1 +
>  2 files changed, 18 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/pci/pcie/ptm.c b/drivers/pci/pcie/ptm.c
> index 368a254e3124..85382c135885 100644
> --- a/drivers/pci/pcie/ptm.c
> +++ b/drivers/pci/pcie/ptm.c
> @@ -31,13 +31,9 @@ static void pci_ptm_info(struct pci_dev *dev)
>  
>  void pci_disable_ptm(struct pci_dev *dev)
>  {
> -	int ptm;
> +	u16 ptm = dev->ptm_cap;
>  	u16 ctrl;
>  
> -	if (!pci_is_pcie(dev))
> -		return;
> -
> -	ptm = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_PTM);
>  	if (!ptm)
>  		return;
>  
> @@ -48,14 +44,10 @@ void pci_disable_ptm(struct pci_dev *dev)
>  
>  void pci_save_ptm_state(struct pci_dev *dev)
>  {
> -	int ptm;
> +	u16 ptm = dev->ptm_cap;
>  	struct pci_cap_saved_state *save_state;
>  	u16 *cap;
>  
> -	if (!pci_is_pcie(dev))
> -		return;
> -
> -	ptm = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_PTM);
>  	if (!ptm)
>  		return;
>  
> @@ -69,16 +61,15 @@ void pci_save_ptm_state(struct pci_dev *dev)
>  
>  void pci_restore_ptm_state(struct pci_dev *dev)
>  {
> +	u16 ptm = dev->ptm_cap;
>  	struct pci_cap_saved_state *save_state;
> -	int ptm;
>  	u16 *cap;
>  
> -	if (!pci_is_pcie(dev))
> +	if (!ptm)
>  		return;
>  
>  	save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_PTM);
> -	ptm = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_PTM);
> -	if (!save_state || !ptm)
> +	if (!save_state)
>  		return;
>  
>  	cap = (u16 *)&save_state->cap.data[0];
> @@ -87,7 +78,7 @@ void pci_restore_ptm_state(struct pci_dev *dev)
>  
>  void pci_ptm_init(struct pci_dev *dev)
>  {
> -	int pos;
> +	u16 ptm;
>  	u32 cap, ctrl;
>  	u8 local_clock;
>  	struct pci_dev *ups;
> @@ -117,13 +108,14 @@ void pci_ptm_init(struct pci_dev *dev)
>  		return;
>  	}
>  
> -	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_PTM);
> -	if (!pos)
> +	ptm = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_PTM);
> +	if (!ptm)
>  		return;
>  
> +	dev->ptm_cap = ptm;
>  	pci_add_ext_cap_save_buffer(dev, PCI_EXT_CAP_ID_PTM, sizeof(u16));
>  
> -	pci_read_config_dword(dev, pos + PCI_PTM_CAP, &cap);
> +	pci_read_config_dword(dev, ptm + PCI_PTM_CAP, &cap);
>  	local_clock = (cap & PCI_PTM_GRANULARITY_MASK) >> 8;
>  
>  	/*
> @@ -148,7 +140,7 @@ void pci_ptm_init(struct pci_dev *dev)
>  	}
>  
>  	ctrl |= dev->ptm_granularity << 8;
> -	pci_write_config_dword(dev, pos + PCI_PTM_CTRL, ctrl);
> +	pci_write_config_dword(dev, ptm + PCI_PTM_CTRL, ctrl);
>  	dev->ptm_enabled = 1;
>  
>  	pci_ptm_info(dev);
> @@ -156,18 +148,19 @@ void pci_ptm_init(struct pci_dev *dev)
>  
>  int pci_enable_ptm(struct pci_dev *dev, u8 *granularity)
>  {
> -	int pos;
> +	u16 ptm;
>  	u32 cap, ctrl;
>  	struct pci_dev *ups;
>  
>  	if (!pci_is_pcie(dev))
>  		return -EINVAL;
>  
> -	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_PTM);
> -	if (!pos)
> +	ptm = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_PTM);
> +	if (!ptm)
>  		return -EINVAL;
>  
> -	pci_read_config_dword(dev, pos + PCI_PTM_CAP, &cap);
> +	dev->ptm_cap = ptm;
> +	pci_read_config_dword(dev, ptm + PCI_PTM_CAP, &cap);
>  	if (!(cap & PCI_PTM_CAP_REQ))
>  		return -EINVAL;
>  
> @@ -192,7 +185,7 @@ int pci_enable_ptm(struct pci_dev *dev, u8 *granularity)
>  
>  	ctrl = PCI_PTM_CTRL_ENABLE;
>  	ctrl |= dev->ptm_granularity << 8;
> -	pci_write_config_dword(dev, pos + PCI_PTM_CTRL, ctrl);
> +	pci_write_config_dword(dev, ptm + PCI_PTM_CTRL, ctrl);
>  	dev->ptm_enabled = 1;
>  
>  	pci_ptm_info(dev);
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index 060af91bafcd..54be939023a3 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -475,6 +475,7 @@ struct pci_dev {
>  	unsigned int	broken_cmd_compl:1;	/* No compl for some cmds */
>  #endif
>  #ifdef CONFIG_PCIE_PTM
> +	u16		ptm_cap;		/* PTM Capability */
>  	unsigned int	ptm_root:1;
>  	unsigned int	ptm_enabled:1;
>  	u8		ptm_granularity;

-- 
Sathyanarayanan Kuppuswamy
Linux Kernel Developer