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Message-ID: <d100f6af-e6d6-1ff4-f6e2-d987a02e5310@microchip.com>
Date:   Fri, 9 Sep 2022 12:34:58 +0000
From:   <Conor.Dooley@...rochip.com>
To:     <mturquette@...libre.com>, <sboyd@...nel.org>,
        <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <palmer@...belt.com>, <Daire.McNamara@...rochip.com>
CC:     <paul.walmsley@...ive.com>, <aou@...s.berkeley.edu>,
        <Claudiu.Beznea@...rochip.com>, <linux-clk@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-riscv@...ts.infradead.org>
Subject: Re: [PATCH v5 00/14] PolarFire SoC reset controller & clock cleanups

On 09/09/2022 13:31, Conor Dooley wrote:

> Changes since v4:
> - use the alternative macro Claudiu suggested for patch 1
> - drop a ~useless intermediate variable in mpfs_deassert()
- add a new patch making the RTC's AHB clock critical

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