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Date: Fri, 9 Sep 2022 15:50:56 +0200 From: Janne Grunau <j@...nau.net> To: asahi@...ts.linux.dev Cc: Mark Kettenis <kettenis@...nbsd.org>, Alyssa Rosenzweig <alyssa@...enzweig.io>, Hector Martin <marcan@...can.st>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Marc Zyngier <maz@...nel.org>, Rob Herring <robh+dt@...nel.org>, Sven Peter <sven@...npeter.dev>, Thomas Gleixner <tglx@...utronix.de>, devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org Subject: [RFC PATCH 03/10] dt-bindings: apple,aic2: Add CPU PMU per-cpu pseudo-interrupts Advertise the two pseudo-interrupts that tied to the two PMU flavours present in the Apple M1 Pro/Max/Ultra SoC. We choose the expose two different pseudo-interrupts to the OS as the e-core PMU is obviously different from the p-core one, effectively presenting two different devices. Imported from "apple,aic". Signed-off-by: Janne Grunau <j@...nau.net> --- .../interrupt-controller/apple,aic2.yaml | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml index 47a78a167aba..06948c0e36a5 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml @@ -69,6 +69,35 @@ properties: power-domains: maxItems: 1 + affinities: + type: object + additionalProperties: false + description: + FIQ affinity can be expressed as a single "affinities" node, + containing a set of sub-nodes, one per FIQ with a non-default + affinity. + patternProperties: + "^.+-affinity$": + type: object + additionalProperties: false + properties: + apple,fiq-index: + description: + The interrupt number specified as a FIQ, and for which + the affinity is not the default. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 5 + + cpus: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Should be a list of phandles to CPU nodes (as described in + Documentation/devicetree/bindings/arm/cpus.yaml). + + required: + - apple,fiq-index + - cpus + required: - compatible - '#interrupt-cells' -- 2.35.1
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