linux-kernel - Re: [PATCH] MIPS: Loongson32: Fix PHY-mode being left unspecified

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Message-ID: <CAJhJPsWYqVoMtLs_YpYKDKg3+YSGGiYfRLGtyUbvW48OfmRLJw@mail.gmail.com>
Date:   Mon, 12 Sep 2022 00:12:29 +0800
From:   Kelvin Cheung <keguang.zhang@...il.com>
To:     Serge Semin <fancer.lancer@...il.com>
Cc:     linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        "David S . Miller" <davem@...emloft.net>,
        Alexandru Ardelean <alexandru.ardelean@...log.com>,
        Serge Semin <Sergey.Semin@...kalelectronics.ru>
Subject: Re: [PATCH] MIPS: Loongson32: Fix PHY-mode being left unspecified

Hello Serge,

Serge Semin <fancer.lancer@...il.com> 于2022年9月11日周日 23:27写道：
>
> Hello Kelvin
>
> On Sun, Sep 11, 2022 at 03:22:51PM +0800, Kelvin Cheung wrote:
> > From: Serge Semin <Sergey.Semin@...kalelectronics.ru>
> >
> > commit 0060c8783330 ("net: stmmac: implement support for passive mode
> > converters via dt") has changed the plat->interface field semantics from
> > containing the PHY-mode to specifying the MAC-PCS interface mode. Due to
> > that the loongson32 platform code will leave the phylink interface
> > uninitialized with the PHY-mode intended by the means of the actual
> > platform setup. The commit-author most likely has just missed the
> > arch-specific code to fix. Let's mend the Loongson32 platform code then by
> > assigning the PHY-mode to the phy_interface field of the STMMAC platform
> > data.
> >
>
> > Fixes: 0060c8783330 ("net: stmmac: implement support for passive mode converters via dt")
> > Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
>
> Your SoB tag should be here too right between mine SoB and TB
> tags [1].

Done.
Just sent PATCH v2.

>
> [1] Documentation/process/submitting-patches.rst, line 419 - 423.
>
> -Sergey
>
> > Tested-by: Keguang Zhang <keguang.zhang@...il.com>
>
> > ---
> >  arch/mips/loongson32/common/platform.c | 16 ++++++++--------
> >  1 file changed, 8 insertions(+), 8 deletions(-)
> >
> > diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/common/platform.c
> > index 794c96c2a4cd..311dc1580bbd 100644
> > --- a/arch/mips/loongson32/common/platform.c
> > +++ b/arch/mips/loongson32/common/platform.c
> > @@ -98,7 +98,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
> >       if (plat_dat->bus_id) {
> >               __raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 |
> >                            GMAC1_USE_UART0, LS1X_MUX_CTRL0);
> > -             switch (plat_dat->interface) {
> > +             switch (plat_dat->phy_interface) {
> >               case PHY_INTERFACE_MODE_RGMII:
> >                       val &= ~(GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
> >                       break;
> > @@ -107,12 +107,12 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
> >                       break;
> >               default:
> >                       pr_err("unsupported mii mode %d\n",
> > -                            plat_dat->interface);
> > +                            plat_dat->phy_interface);
> >                       return -ENOTSUPP;
> >               }
> >               val &= ~GMAC1_SHUT;
> >       } else {
> > -             switch (plat_dat->interface) {
> > +             switch (plat_dat->phy_interface) {
> >               case PHY_INTERFACE_MODE_RGMII:
> >                       val &= ~(GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
> >                       break;
> > @@ -121,7 +121,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
> >                       break;
> >               default:
> >                       pr_err("unsupported mii mode %d\n",
> > -                            plat_dat->interface);
> > +                            plat_dat->phy_interface);
> >                       return -ENOTSUPP;
> >               }
> >               val &= ~GMAC0_SHUT;
> > @@ -131,7 +131,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
> >       plat_dat = dev_get_platdata(&pdev->dev);
> >
> >       val &= ~PHY_INTF_SELI;
> > -     if (plat_dat->interface == PHY_INTERFACE_MODE_RMII)
> > +     if (plat_dat->phy_interface == PHY_INTERFACE_MODE_RMII)
> >               val |= 0x4 << PHY_INTF_SELI_SHIFT;
> >       __raw_writel(val, LS1X_MUX_CTRL1);
> >
> > @@ -146,9 +146,9 @@ static struct plat_stmmacenet_data ls1x_eth0_pdata = {
> >       .bus_id                 = 0,
> >       .phy_addr               = -1,
> >  #if defined(CONFIG_LOONGSON1_LS1B)
> > -     .interface              = PHY_INTERFACE_MODE_MII,
> > +     .phy_interface          = PHY_INTERFACE_MODE_MII,
> >  #elif defined(CONFIG_LOONGSON1_LS1C)
> > -     .interface              = PHY_INTERFACE_MODE_RMII,
> > +     .phy_interface          = PHY_INTERFACE_MODE_RMII,
> >  #endif
> >       .mdio_bus_data          = &ls1x_mdio_bus_data,
> >       .dma_cfg                = &ls1x_eth_dma_cfg,
> > @@ -186,7 +186,7 @@ struct platform_device ls1x_eth0_pdev = {
> >  static struct plat_stmmacenet_data ls1x_eth1_pdata = {
> >       .bus_id                 = 1,
> >       .phy_addr               = -1,
> > -     .interface              = PHY_INTERFACE_MODE_MII,
> > +     .phy_interface          = PHY_INTERFACE_MODE_MII,
> >       .mdio_bus_data          = &ls1x_mdio_bus_data,
> >       .dma_cfg                = &ls1x_eth_dma_cfg,
> >       .has_gmac               = 1,
> >
> > base-commit: 727488e305b223ca69205ca5a3b99ace21bbbf5f
> > --
> > 2.34.1
> >



-- 
Best regards,

Kelvin Cheung