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Date:   Sun, 11 Sep 2022 21:20:21 +0300
From:   Serge Semin <fancer.lancer@...il.com>
To:     "Larson, Bradley" <Bradley.Larson@....com>
Cc:     Brad Larson <brad@...sando.io>,
        Andy Shevchenko <andy.shevchenko@...il.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
        "adrian.hunter@...el.com" <adrian.hunter@...el.com>,
        "alcooperx@...il.com" <alcooperx@...il.com>,
        "arnd@...db.de" <arnd@...db.de>,
        "brijeshkumar.singh@....com" <brijeshkumar.singh@....com>,
        "catalin.marinas@....com" <catalin.marinas@....com>,
        "gsomlo@...il.com" <gsomlo@...il.com>,
        "gerg@...ux-m68k.org" <gerg@...ux-m68k.org>,
        "krzk@...nel.org" <krzk@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "lee.jones@...aro.org" <lee.jones@...aro.org>,
        "broonie@...nel.org" <broonie@...nel.org>,
        "yamada.masahiro@...ionext.com" <yamada.masahiro@...ionext.com>,
        "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
        "piotrs@...ence.com" <piotrs@...ence.com>,
        "p.yadav@...com" <p.yadav@...com>,
        "rdunlap@...radead.org" <rdunlap@...radead.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "samuel@...lland.org" <samuel@...lland.org>,
        "Suthikulpanit, Suravee" <Suravee.Suthikulpanit@....com>,
        "Lendacky, Thomas" <Thomas.Lendacky@....com>,
        "ulf.hansson@...aro.org" <ulf.hansson@...aro.org>,
        "will@...nel.org" <will@...nel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH v6 12/17] spi: dw: Add support for AMD Pensando Elba SoC

On Wed, Aug 31, 2022 at 06:04:02PM +0000, Larson, Bradley wrote:
> On 8/21/22 11:18 AM, Serge Semin wrote:
> > On Sat, Aug 20, 2022 at 12:57:45PM -0700, Brad Larson wrote:
> >> From: Brad Larson <blarson@....com>
> >>
> >> The AMD Pensando Elba SoC includes a DW apb_ssi v4 controller
> >> with device specific chip-select control.  The Elba SoC
> >> provides four chip-selects where the native DW IP supports
> >> two chip-selects.  The Elba DW_SPI instance has two native
> >> CS signals that are always overridden.
> >>
> >> Signed-off-by: Brad Larson <blarson@....com>
> >> ---
> >>   drivers/spi/spi-dw-mmio.c | 77 +++++++++++++++++++++++++++++++++++++++
> >>   1 file changed, 77 insertions(+)
> >>
> >> diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c
> >> index 26c40ea6dd12..36b8c5e10bb3 100644
> >> --- a/drivers/spi/spi-dw-mmio.c
> >> +++ b/drivers/spi/spi-dw-mmio.c
> >> @@ -53,6 +53,24 @@ struct dw_spi_mscc {
> >>        void __iomem        *spi_mst; /* Not sparx5 */
> >>   };
> >>
> >> +struct dw_spi_elba {
> >> +     struct regmap *syscon;
> >> +};
> >> +
> >> +/*
> >> + * Elba SoC does not use ssi, pin override is used for cs 0,1 and
> >> + * gpios for cs 2,3 as defined in the device tree.
> >> + *
> >> + * cs:  |       1               0
> >> + * bit: |---3-------2-------1-------0
> >> + *      |  cs1   cs1_ovr   cs0   cs0_ovr
> >> + */
> >> +#define ELBA_SPICS_REG                       0x2468
> >> +#define ELBA_SPICS_SHIFT(cs)         (2 * (cs))
> >> +#define ELBA_SPICS_MASK(cs)          (0x3 << ELBA_SPICS_SHIFT(cs))
> >> +#define ELBA_SPICS_SET(cs, val)      \
> >> +                     ((((val) << 1) | 0x1) << ELBA_SPICS_SHIFT(cs))
> > Please take the @Andy' notes into account:
> > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kernel.org%2Flkml%2FCAHp75Vex0VkECYd%3DkY0m6%3DjXBYSXg2UFu7vn271%2BQ49WZn22GA%40mail.gmail.com%2F&amp;data=05%7C01%7CBradley.Larson%40amd.com%7C25d0f17dfcbd44f661c808da83a19a98%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637967027418603429%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&amp;sdata=VFI%2FptM79YYbZm%2FyQmtssLsNIQ75AOU05ronZ1QStlU%3D&amp;reserved=0
> 
> Yes, I had a tested change for this but missed adding to the patch update.
> This is the change and I'll resend just this patch.
> 
> --- a/drivers/spi/spi-dw-mmio.c
> +++ b/drivers/spi/spi-dw-mmio.c
> @@ -66,10 +66,6 @@ struct dw_spi_elba {
>    *      |  cs1   cs1_ovr   cs0   cs0_ovr
>    */
>   #define ELBA_SPICS_REG 0x2468

> -#define ELBA_SPICS_SHIFT(cs)           (2 * (cs))
> -#define ELBA_SPICS_MASK(cs)            (0x3 << ELBA_SPICS_SHIFT(cs))
> -#define ELBA_SPICS_SET(cs, val)        \
> -                       ((((val) << 1) | 0x1) << ELBA_SPICS_SHIFT(cs))

Why do you remove these macros? Just replace 0x3 with GENMASM(1, 0),
0x1 with BIT(0), (2 * (cs)) statement with ((cs) << 1) as Andy
suggested. Using macros for such complex statement is a good practice.

Also please rename ELBA_SPICS_SHIFT() to ELBA_SPICS_OFFSET() so to
have a more coherent CSR-related macros naming in the driver.

-Sergey

> 
>   /*
>    * The Designware SPI controller (referred to as master in the 
> documentation)
> @@ -257,8 +253,9 @@ static int dw_spi_canaan_k210_init(struct 
> platform_device *pdev,
> 
>   static void dw_spi_elba_override_cs(struct dw_spi_elba *dwselba, int 
> cs, int enable)
>   {
> - regmap_update_bits(dwselba->syscon, ELBA_SPICS_REG, ELBA_SPICS_MASK(cs),
> -                          ELBA_SPICS_SET(cs, enable));
> + regmap_update_bits(dwselba->syscon, ELBA_SPICS_REG,
> +                          (GENMASK(1, 0) << ((cs) << 1)),
> +                          ((enable) << 1 | BIT(0)) << ((cs) << 1));
> 
>   }
> 
> > One more nitpick below.
> >
> > +static int dw_spi_elba_init(struct platform_device *pdev,
> > +                         struct dw_spi_mmio *dwsmmio)
> > +{
> > +     const char *syscon_name = "amd,pensando-elba-syscon";
> > +     struct device_node *np = pdev->dev.of_node;
> >> +     struct device_node *node;
> >> +     struct dw_spi_elba *dwselba;
> > Please, use the reverse xmas tree order of the local variables
> > as the rest of the driver mainly implies.
> Changed to reverse xmas tree ordering.
> 
> Regards,
> Brad

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