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Message-ID: <20220912132337.18159-2-pshete@nvidia.com>
Date: Mon, 12 Sep 2022 18:53:37 +0530
From: Prathamesh Shete <pshete@...dia.com>
To: <adrian.hunter@...el.com>, <ulf.hansson@...aro.org>,
<thierry.reding@...il.com>, <jonathanh@...dia.com>,
<p.zabel@...gutronix.de>, <linux-mmc@...r.kernel.org>,
<linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: <anrao@...dia.com>, <smangipudi@...dia.com>, <pshete@...dia.com>
Subject: [PATCH 2/2] mmc: sdhci-tegra: Use actual clock rate for SW tuning correction
Ensure tegra_host member "curr_clk_rate" holds the actual clock rate
instead of requested clock rate for proper use during tuning correction
algorithm.
Fixes: ea8fc5953e8b ("mmc: tegra: update hw tuning process")
Signed-off-by: Aniruddha TVS Rao <anrao@...dia.com>
Signed-off-by: Prathamesh Shete <pshete@...dia.com>
---
drivers/mmc/host/sdhci-tegra.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 136c045d8f01..3a3d188e8c65 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -773,7 +773,7 @@ static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
dev_err(dev, "failed to set clk rate to %luHz: %d\n",
host_clk, err);
- tegra_host->curr_clk_rate = host_clk;
+ tegra_host->curr_clk_rate = clk_get_rate(pltfm_host->clk);
if (tegra_host->ddr_signaling)
host->max_clk = host_clk;
else
--
2.17.1
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