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Date: Mon, 12 Sep 2022 11:16:06 -0700
From: Tim Harvey <tharvey@...eworks.com>
To: Shawn Guo <shawnguo@...nel.org>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>
Subject: Re: [PATCH 2/2] arm64: dts: imx: Add i.mx8mm Gateworks gw7904 dts support
On Mon, Sep 12, 2022 at 1:54 AM Shawn Guo <shawnguo@...nel.org> wrote:
>
> On Fri, Sep 02, 2022 at 04:05:00PM -0700, Tim Harvey wrote:
> > The GW7904 is based on the i.MX 8M Mini SoC featuring:
> > - LPDDR4 DRAM
> > - eMMC FLASH
> > - microSD connector with UHS support
> > - LIS2DE12 3-axis accelerometer
> > - Gateworks System Controller
> > - IMX8M FEC
> > - 2x RS232 off-board connectors
> > - PMIC
> > - 10x bi-color LED's
> > - 1x miniPCIe socket with PCIe and USB2.0
> > - 802.3at Class 4 PoE
> > - 10-30VDC input via barrel-jack
> >
> > Signed-off-by: Tim Harvey <tharvey@...eworks.com>
> > Cc: Rob Herring <robh+dt@...nel.org>
> > Cc: Krzysztof Kozlowski <krzk+dt@...nel.org>
> > Cc: Shawn Guo <shawnguo@...nel.org>
> > Cc: Sascha Hauer <s.hauer@...gutronix.de>
> > Cc: Pengutronix Kernel Team <kernel@...gutronix.de>
> > Cc: Fabio Estevam <festevam@...il.com>
> > Cc: NXP Linux Team <linux-imx@....com>
>
> Could you move these Cc after --- below?
>
> > ---
> > arch/arm64/boot/dts/freescale/Makefile | 1 +
> > .../dts/freescale/imx8mm-venice-gw7904.dts | 888 ++++++++++++++++++
> > 2 files changed, 889 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts
> >
> > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> > index 8bf7f7ecebaa..d7ae965d2b36 100644
> > --- a/arch/arm64/boot/dts/freescale/Makefile
> > +++ b/arch/arm64/boot/dts/freescale/Makefile
> > @@ -67,6 +67,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x.dtb
> > dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7901.dtb
> > dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7902.dtb
> > dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7903.dtb
> > +dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7904.dtb
> > dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-dahlia.dtb
> > dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-dev.dtb
> > dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-wifi-dahlia.dtb
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts
> > new file mode 100644
> > index 000000000000..02ba85a0842a
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts
> > @@ -0,0 +1,888 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright 2022 Gateworks Corporation
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/input/linux-event-codes.h>
> > +#include <dt-bindings/leds/common.h>
> > +#include <dt-bindings/phy/phy-imx8-pcie.h>
> > +
> > +#include "imx8mm.dtsi"
> > +
> > +/ {
> > + model = "Gateworks Venice GW7904 i.MX8MM board";
> > + compatible = "gateworks,imx8mm-gw7904", "fsl,imx8mm";
> > +
> > + chosen {
> > + stdout-path = &uart2;
> > + };
> > +
> > + memory@...00000 {
> > + device_type = "memory";
> > + reg = <0x0 0x40000000 0 0x80000000>;
> > + };
> > +
> > + gpio-keys {
> > + compatible = "gpio-keys";
> > +
> > + key-0 {
> > + label = "user_pb";
> > + gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
> > + linux,code = <BTN_0>;
> > + };
> > +
> > + key-1 {
> > + label = "user_pb1x";
> > + linux,code = <BTN_1>;
> > + interrupt-parent = <&gsc>;
> > + interrupts = <0>;
> > + };
> > +
> > + key-2 {
> > + label = "key_erased";
> > + linux,code = <BTN_2>;
> > + interrupt-parent = <&gsc>;
> > + interrupts = <1>;
> > + };
> > +
> > + key-3 {
> > + label = "eeprom_wp";
> > + linux,code = <BTN_3>;
> > + interrupt-parent = <&gsc>;
> > + interrupts = <2>;
> > + };
> > +
> > + key-4 {
> > + label = "switch_hold";
> > + linux,code = <BTN_5>;
> > + interrupt-parent = <&gsc>;
> > + interrupts = <7>;
> > + };
> > + };
> > +
> > + led-controller {
> > + compatible = "gpio-leds";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_gpio_leds>;
> > +
> > + led-0 {
> > + function = LED_FUNCTION_STATUS;
> > + color = <LED_COLOR_ID_GREEN>;
> > + label = "led01_grn";
> > + gpios = <&gpioled 0 GPIO_ACTIVE_LOW>;
> > + default-state = "off";
> > + };
> > +
> > + led-1 {
> > + function = LED_FUNCTION_STATUS;
> > + color = <LED_COLOR_ID_YELLOW>;
> > + label = "led01_yel";
> > + gpios = <&gpioled 1 GPIO_ACTIVE_LOW>;
> > + default-state = "off";
> > + };
> > +
> > + led-2 {
> > + function = LED_FUNCTION_STATUS;
> > + color = <LED_COLOR_ID_GREEN>;
> > + label = "led02_grn";
> > + gpios = <&gpioled 2 GPIO_ACTIVE_LOW>;
> > + default-state = "off";
> > + };
> > +
> > + led-3 {
> > + function = LED_FUNCTION_STATUS;
> > + color = <LED_COLOR_ID_YELLOW>;
> > + label = "led02_yel";
> > + gpios = <&gpioled 3 GPIO_ACTIVE_LOW>;
> > + default-state = "off";
> > + };
> > +
> > + led-4 {
> > + function = LED_FUNCTION_STATUS;
> > + color = <LED_COLOR_ID_GREEN>;
> > + label = "led03_grn";
> > + gpios = <&gpioled 4 GPIO_ACTIVE_LOW>;
> > + default-state = "off";
> > + };
> > +
> > + led-5 {
> > + function = LED_FUNCTION_STATUS;
> > + color = <LED_COLOR_ID_YELLOW>;
> > + label = "led03_yel";
> > + gpios = <&gpioled 5 GPIO_ACTIVE_LOW>;
> > + default-state = "off";
> > + };
> > +
> > + led-6 {
> > + function = LED_FUNCTION_STATUS;
> > + color = <LED_COLOR_ID_GREEN>;
> > + label = "led04_grn";
> > + gpios = <&gpioled 6 GPIO_ACTIVE_LOW>;
> > + default-state = "off";
> > + };
> > +
> > + led-7 {
> > + function = LED_FUNCTION_STATUS;
> > + color = <LED_COLOR_ID_YELLOW>;
> > + label = "led04_yel";
> > + gpios = <&gpioled 7 GPIO_ACTIVE_LOW>;
> > + default-state = "off";
> > + };
> > +
> > + led-8 {
> > + function = LED_FUNCTION_STATUS;
> > + color = <LED_COLOR_ID_GREEN>;
> > + label = "led05_grn";
> > + gpios = <&gpioled 8 GPIO_ACTIVE_LOW>;
> > + default-state = "off";
> > + };
> > +
> > + led-9 {
> > + function = LED_FUNCTION_STATUS;
> > + color = <LED_COLOR_ID_YELLOW>;
> > + label = "led05_yel";
> > + gpios = <&gpioled 9 GPIO_ACTIVE_LOW>;
> > + default-state = "off";
> > + };
> > +
> > + led-a {
>
> The binding doesn't seem to define the number explicitly. I understand
> we use hex in unit-address, but not sure a hex number is better than
> decimal as part of node name, mostly meant to count the instance.
>
> Shawn
Shawn,
Ok - I will change them to decimal. I didn't really like the look of it either.
Thanks,
Tim+
> > +&usbotg1 {
> > + dr_mode = "host";
> > + disable-over-current;
> > + status = "okay";
> > +};
> > +
> > +/* microSD */
> > +&usdhc2 {
> > + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
> > + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
> > + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
> > + cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
> > + bus-width = <4>;
> > + vmmc-supply = <®_3p3v>;
> > + status = "okay";
> > +};
> > +
> > +/* eMMC */
> > +&usdhc3 {
> > + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > + pinctrl-0 = <&pinctrl_usdhc3>;
> > + pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
> > + pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
> > + bus-width = <8>;
> > + non-removable;
> > + status = "okay";
> > +};
> > +
> > +&wdog1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_wdog>;
> > + fsl,ext-reset-output;
> > + status = "okay";
> > +};
> > +
> > +&iomuxc {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_hog>;
> > +
> > + pinctrl_hog: hoggrp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x40000041 /* RS232# */
> > + MX8MM_IOMUXC_ECSPI2_MISO_GPIO5_IO12 0x40000041 /* PCI_WDIS# */
> > + >;
> > + };
> > +
> > + pinctrl_accel: accelgrp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x159
> > + >;
> > + };
> > +
> > + pinctrl_fec1: fec1grp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
> > + MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
> > + MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
> > + MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
> > + MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
> > + MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
> > + MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
> > + MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
> > + MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
> > + MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
> > + MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
> > + MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
> > + MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
> > + MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
> > + MX8MM_IOMUXC_SAI2_TXFS_GPIO4_IO24 0x19 /* IRQ# */
> > + MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x19 /* RST# */
> > + >;
> > + };
> > +
> > + pinctrl_gpio_leds: gpioledsgrp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x40000019
> > + MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x40000019
> > + MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x40000019
> > + MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x40000019
> > + >;
> > + };
> > +
> > + pinctrl_gsc: gscgrp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x159
> > + >;
> > + };
> > +
> > + pinctrl_i2c1: i2c1grp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
> > + MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
> > + >;
> > + };
> > +
> > + pinctrl_i2c2: i2c2grp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
> > + MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
> > + >;
> > + };
> > +
> > + pinctrl_i2c3: i2c3grp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
> > + MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
> > + >;
> > + };
> > +
> > + pinctrl_i2c4: i2c4grp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
> > + MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
> > + >;
> > + };
> > +
> > + pinctrl_pcie0: pciegrp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_ECSPI2_MOSI_GPIO5_IO11 0x41
> > + >;
> > + };
> > +
> > + pinctrl_pmic: pmicgrp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_NAND_DATA02_GPIO3_IO8 0x41
> > + >;
> > + };
> > +
> > + pinctrl_uart1: uart1grp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
> > + MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
> > + >;
> > + };
> > +
> > + pinctrl_uart2: uart2grp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
> > + MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
> > + >;
> > + };
> > +
> > + pinctrl_uart3: uart3grp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
> > + MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
> > + >;
> > + };
> > +
> > + pinctrl_usdhc2: usdhc2grp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
> > + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
> > + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
> > + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
> > + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
> > + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
> > + >;
> > + };
> > +
> > + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
> > + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
> > + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
> > + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
> > + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
> > + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
> > + >;
> > + };
> > +
> > + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
> > + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
> > + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
> > + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
> > + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
> > + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
> > + >;
> > + };
> > +
> > + pinctrl_usdhc2_gpio: usdhc2-gpiogrp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4
> > + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
> > + >;
> > + };
> > +
> > + pinctrl_usdhc3: usdhc3grp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
> > + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
> > + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
> > + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
> > + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
> > + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
> > + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
> > + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
> > + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
> > + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
> > + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
> > + >;
> > + };
> > +
> > + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
> > + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
> > + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
> > + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
> > + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
> > + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
> > + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
> > + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
> > + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
> > + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
> > + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
> > + >;
> > + };
> > +
> > + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
> > + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
> > + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
> > + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
> > + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
> > + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
> > + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
> > + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
> > + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
> > + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
> > + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
> > + >;
> > + };
> > +
> > + pinctrl_wdog: wdoggrp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
> > + >;
> > + };
> > +};
> > --
> > 2.25.1
> >
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