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Message-ID: <BN9PR11MB52766A868879689D55AE9DC68C479@BN9PR11MB5276.namprd11.prod.outlook.com>
Date: Tue, 13 Sep 2022 08:01:09 +0000
From: "Tian, Kevin" <kevin.tian@...el.com>
To: Lu Baolu <baolu.lu@...ux.intel.com>,
"iommu@...ts.linux.dev" <iommu@...ts.linux.dev>
CC: Joerg Roedel <joro@...tes.org>, Will Deacon <will@...nel.org>,
"Robin Murphy" <robin.murphy@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 1/1] iommu/vt-d: Enable PASID during iommu device probe
> From: Lu Baolu <baolu.lu@...ux.intel.com>
> Sent: Monday, September 12, 2022 10:48 AM
>
> @@ -1401,7 +1403,6 @@ static void iommu_enable_dev_iotlb(struct
> device_domain_info *info)
This is not the right name now as dev_iotlb is only related to ATS.
> info->pfsid = pci_dev_id(pf_pdev);
> }
>
> -#ifdef CONFIG_INTEL_IOMMU_SVM
> /* The PCIe spec, in its wisdom, declares that the behaviour of
> the device if you enable PASID support after ATS support is
> undefined. So always enable PASID support on devices which
> @@ -1414,7 +1415,7 @@ static void iommu_enable_dev_iotlb(struct
> device_domain_info *info)
> (info->pasid_enabled ? pci_prg_resp_pasid_required(pdev) : 1)
> &&
> !pci_reset_pri(pdev) && !pci_enable_pri(pdev, PRQ_DEPTH))
> info->pri_enabled = 1;
> -#endif
> +
> if (info->ats_supported && pci_ats_page_aligned(pdev) &&
> !pci_enable_ats(pdev, VTD_PAGE_SHIFT)) {
> info->ats_enabled = 1;
iommu_enable_dev_iotlb() is currently called both when the device is probed
and when sva is enabled (which is actually useless). From this angle the commit
msg is inaccurate.
> diff --git a/drivers/iommu/intel/Kconfig b/drivers/iommu/intel/Kconfig
> index 39a06d245f12..b3f40375f214 100644
> --- a/drivers/iommu/intel/Kconfig
> +++ b/drivers/iommu/intel/Kconfig
> @@ -21,6 +21,8 @@ config INTEL_IOMMU
> select IOASID
> select IOMMU_DMA
> select PCI_ATS
> + select PCI_PRI
> + select PCI_PASID
> help
> DMA remapping (DMAR) devices support enables independent
> address
> translations for Direct Memory Access (DMA) from devices.
> @@ -48,8 +50,6 @@ config INTEL_IOMMU_DEBUGFS
> config INTEL_IOMMU_SVM
> bool "Support for Shared Virtual Memory with Intel IOMMU"
> depends on X86_64
> - select PCI_PASID
> - select PCI_PRI
> select MMU_NOTIFIER
> select IOASID
this is already selected by CONFIG_INTEL_IOMMU
> select IOMMU_SVA
> --
> 2.25.1
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