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Message-Id: <20220913140419.016363032@linuxfoundation.org>
Date: Tue, 13 Sep 2022 16:04:46 +0200
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org, Kan Liang <kan.liang@...ux.intel.com>,
Xing Zhengjun <zhengjun.xing@...ux.intel.com>,
Alexander Shishkin <alexander.shishkin@...el.com>,
Andi Kleen <ak@...ux.intel.com>,
Ian Rogers <irogers@...gle.com>,
Ingo Molnar <mingo@...hat.com>, Jiri Olsa <jolsa@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
Peter Zijlstra <peterz@...radead.org>,
Arnaldo Carvalho de Melo <acme@...hat.com>,
Sasha Levin <sashal@...nel.org>
Subject: [PATCH 5.19 180/192] perf stat: Fix L2 Topdown metrics disappear for raw events
From: Zhengjun Xing <zhengjun.xing@...ux.intel.com>
[ Upstream commit f0c86a2bae4fd12bfa8bad4d43fb59fb498cdd14 ]
In perf/Documentation/perf-stat.txt, for "--td-level" the default "0" means
the max level that the current hardware support.
So we need initialize the stat_config.topdown_level to TOPDOWN_MAX_LEVEL
when “--td-level=0” or no “--td-level” option. Otherwise, for the
hardware with a max level is 2, the 2nd level metrics disappear for raw
events in this case.
The issue cannot be observed for the perf stat default or "--topdown"
options. This commit fixes the raw events issue and removes the
duplicated code for the perf stat default.
Before:
# ./perf stat -e "cpu-clock,context-switches,cpu-migrations,page-faults,instructions,cycles,ref-cycles,branches,branch-misses,{slots,topdown-retiring,topdown-bad-spec,topdown-fe-bound,topdown-be-bound,topdown-heavy-ops,topdown-br-mispredict,topdown-fetch-lat,topdown-mem-bound}" sleep 1
Performance counter stats for 'sleep 1':
1.03 msec cpu-clock # 0.001 CPUs utilized
1 context-switches # 966.216 /sec
0 cpu-migrations # 0.000 /sec
60 page-faults # 57.973 K/sec
1,132,112 instructions # 1.41 insn per cycle
803,872 cycles # 0.777 GHz
1,909,120 ref-cycles # 1.845 G/sec
236,634 branches # 228.640 M/sec
6,367 branch-misses # 2.69% of all branches
4,823,232 slots # 4.660 G/sec
1,210,536 topdown-retiring # 25.1% Retiring
699,841 topdown-bad-spec # 14.5% Bad Speculation
1,777,975 topdown-fe-bound # 36.9% Frontend Bound
1,134,878 topdown-be-bound # 23.5% Backend Bound
189,146 topdown-heavy-ops # 182.756 M/sec
662,012 topdown-br-mispredict # 639.647 M/sec
1,097,048 topdown-fetch-lat # 1.060 G/sec
416,121 topdown-mem-bound # 402.063 M/sec
1.002423690 seconds time elapsed
0.002494000 seconds user
0.000000000 seconds sys
After:
# ./perf stat -e "cpu-clock,context-switches,cpu-migrations,page-faults,instructions,cycles,ref-cycles,branches,branch-misses,{slots,topdown-retiring,topdown-bad-spec,topdown-fe-bound,topdown-be-bound,topdown-heavy-ops,topdown-br-mispredict,topdown-fetch-lat,topdown-mem-bound}" sleep 1
Performance counter stats for 'sleep 1':
1.13 msec cpu-clock # 0.001 CPUs utilized
1 context-switches # 882.128 /sec
0 cpu-migrations # 0.000 /sec
61 page-faults # 53.810 K/sec
1,137,612 instructions # 1.29 insn per cycle
881,477 cycles # 0.778 GHz
2,093,496 ref-cycles # 1.847 G/sec
236,356 branches # 208.496 M/sec
7,090 branch-misses # 3.00% of all branches
5,288,862 slots # 4.665 G/sec
1,223,697 topdown-retiring # 23.1% Retiring
767,403 topdown-bad-spec # 14.5% Bad Speculation
2,053,322 topdown-fe-bound # 38.8% Frontend Bound
1,244,438 topdown-be-bound # 23.5% Backend Bound
186,665 topdown-heavy-ops # 3.5% Heavy Operations # 19.6% Light Operations
725,922 topdown-br-mispredict # 13.7% Branch Mispredict # 0.8% Machine Clears
1,327,400 topdown-fetch-lat # 25.1% Fetch Latency # 13.7% Fetch Bandwidth
497,775 topdown-mem-bound # 9.4% Memory Bound # 14.1% Core Bound
1.002701530 seconds time elapsed
0.002744000 seconds user
0.000000000 seconds sys
Fixes: 63e39aa6ae103451 ("perf stat: Support L2 Topdown events")
Reviewed-by: Kan Liang <kan.liang@...ux.intel.com>
Signed-off-by: Xing Zhengjun <zhengjun.xing@...ux.intel.com>
Cc: Alexander Shishkin <alexander.shishkin@...el.com>
Cc: Andi Kleen <ak@...ux.intel.com>
Cc: Ian Rogers <irogers@...gle.com>
Cc: Ingo Molnar <mingo@...hat.com>
Cc: Jiri Olsa <jolsa@...nel.org>
Cc: Kan Liang <kan.liang@...ux.intel.com>
Cc: Namhyung Kim <namhyung@...nel.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Link: https://lore.kernel.org/r/20220826140057.3289401-1-zhengjun.xing@linux.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@...hat.com>
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
tools/perf/builtin-stat.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c
index 5aacb7ed8c24a..82e14faecc3e4 100644
--- a/tools/perf/builtin-stat.c
+++ b/tools/perf/builtin-stat.c
@@ -1944,6 +1944,9 @@ static int add_default_attributes(void)
free(str);
}
+ if (!stat_config.topdown_level)
+ stat_config.topdown_level = TOPDOWN_MAX_LEVEL;
+
if (!evsel_list->core.nr_entries) {
if (target__has_cpu(&target))
default_attrs0[0].config = PERF_COUNT_SW_CPU_CLOCK;
@@ -1960,8 +1963,6 @@ static int add_default_attributes(void)
}
if (evlist__add_default_attrs(evsel_list, default_attrs1) < 0)
return -1;
-
- stat_config.topdown_level = TOPDOWN_MAX_LEVEL;
/* Platform specific attrs */
if (evlist__add_default_attrs(evsel_list, default_null_attrs) < 0)
return -1;
--
2.35.1
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