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Date: Tue, 13 Sep 2022 16:04:57 +0200
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org, Daniel Wheeler <daniel.wheeler@....com>,
Charlene Liu <Charlene.Liu@....com>,
Rodrigo Siqueira <Rodrigo.Siqueira@....com>,
Saaem Rizvi <SyedSaaem.Rizvi@....com>,
Alex Deucher <alexander.deucher@....com>
Subject: [PATCH 5.19 191/192] drm/amd/display: Add SMU logging code
From: Saaem Rizvi <SyedSaaem.Rizvi@....com>
commit 4b33b5ffcf68de3a43e7dddc91c5dc86e6ed8587 upstream.
[WHY]
Logging for SMU response value after the wait allows us to know
immediately what the response value was. Makes it easier to debug should
the value be anything other than OK.
[HOW]
Using the the already available DC SMU logging functions.
Tested-by: Daniel Wheeler <daniel.wheeler@....com>
Reviewed-by: Charlene Liu <Charlene.Liu@....com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@....com>
Signed-off-by: Saaem Rizvi <SyedSaaem.Rizvi@....com>
Signed-off-by: Alex Deucher <alexander.deucher@....com>
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c | 12 ++++++++++
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/dcn301_smu.c | 12 ++++++++++
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c | 8 ++++++
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c | 8 ++++++
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c | 8 ++++++
5 files changed, 48 insertions(+)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c
@@ -41,6 +41,12 @@
#define FN(reg_name, field) \
FD(reg_name##__##field)
+#include "logger_types.h"
+#undef DC_LOGGER
+#define DC_LOGGER \
+ CTX->logger
+#define smu_print(str, ...) {DC_LOG_SMU(str, ##__VA_ARGS__); }
+
#define VBIOSSMC_MSG_TestMessage 0x1
#define VBIOSSMC_MSG_GetSmuVersion 0x2
#define VBIOSSMC_MSG_PowerUpGfx 0x3
@@ -97,6 +103,12 @@ static int rn_vbios_smu_send_msg_with_pa
result = rn_smu_wait_for_response(clk_mgr, 10, 200000);
ASSERT(result == VBIOSSMC_Result_OK);
+ smu_print("SMU response after wait: %d\n", result);
+
+ if (result == VBIOSSMC_Status_BUSY) {
+ return -1;
+ }
+
/* First clear response register */
REG_WRITE(MP1_SMN_C2PMSG_91, VBIOSSMC_Status_BUSY);
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/dcn301_smu.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/dcn301_smu.c
@@ -41,6 +41,12 @@
#define FN(reg_name, field) \
FD(reg_name##__##field)
+#include "logger_types.h"
+#undef DC_LOGGER
+#define DC_LOGGER \
+ CTX->logger
+#define smu_print(str, ...) {DC_LOG_SMU(str, ##__VA_ARGS__); }
+
#define VBIOSSMC_MSG_GetSmuVersion 0x2
#define VBIOSSMC_MSG_SetDispclkFreq 0x4
#define VBIOSSMC_MSG_SetDprefclkFreq 0x5
@@ -96,6 +102,12 @@ static int dcn301_smu_send_msg_with_para
result = dcn301_smu_wait_for_response(clk_mgr, 10, 200000);
+ smu_print("SMU response after wait: %d\n", result);
+
+ if (result == VBIOSSMC_Status_BUSY) {
+ return -1;
+ }
+
/* First clear response register */
REG_WRITE(MP1_SMN_C2PMSG_91, VBIOSSMC_Status_BUSY);
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c
@@ -40,6 +40,12 @@
#define FN(reg_name, field) \
FD(reg_name##__##field)
+#include "logger_types.h"
+#undef DC_LOGGER
+#define DC_LOGGER \
+ CTX->logger
+#define smu_print(str, ...) {DC_LOG_SMU(str, ##__VA_ARGS__); }
+
#define VBIOSSMC_MSG_TestMessage 0x1
#define VBIOSSMC_MSG_GetSmuVersion 0x2
#define VBIOSSMC_MSG_PowerUpGfx 0x3
@@ -104,6 +110,8 @@ static int dcn31_smu_send_msg_with_param
result = dcn31_smu_wait_for_response(clk_mgr, 10, 200000);
ASSERT(result == VBIOSSMC_Result_OK);
+ smu_print("SMU response after wait: %d\n", result);
+
if (result == VBIOSSMC_Status_BUSY) {
return -1;
}
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c
@@ -70,6 +70,12 @@ static const struct IP_BASE NBIO_BASE =
#define REG_NBIO(reg_name) \
(NBIO_BASE.instance[0].segment[regBIF_BX_PF2_ ## reg_name ## _BASE_IDX] + regBIF_BX_PF2_ ## reg_name)
+#include "logger_types.h"
+#undef DC_LOGGER
+#define DC_LOGGER \
+ CTX->logger
+#define smu_print(str, ...) {DC_LOG_SMU(str, ##__VA_ARGS__); }
+
#define mmMP1_C2PMSG_3 0x3B1050C
#define VBIOSSMC_MSG_TestMessage 0x01 ///< To check if PMFW is alive and responding. Requirement specified by PMFW team
@@ -132,6 +138,8 @@ static int dcn315_smu_send_msg_with_para
result = dcn315_smu_wait_for_response(clk_mgr, 10, 200000);
ASSERT(result == VBIOSSMC_Result_OK);
+ smu_print("SMU response after wait: %d\n", result);
+
if (result == VBIOSSMC_Status_BUSY) {
return -1;
}
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c
@@ -58,6 +58,12 @@ static const struct IP_BASE MP0_BASE = {
#define FN(reg_name, field) \
FD(reg_name##__##field)
+#include "logger_types.h"
+#undef DC_LOGGER
+#define DC_LOGGER \
+ CTX->logger
+#define smu_print(str, ...) {DC_LOG_SMU(str, ##__VA_ARGS__); }
+
#define VBIOSSMC_MSG_TestMessage 0x01 ///< To check if PMFW is alive and responding. Requirement specified by PMFW team
#define VBIOSSMC_MSG_GetPmfwVersion 0x02 ///< Get PMFW version
#define VBIOSSMC_MSG_Spare0 0x03 ///< Spare0
@@ -120,6 +126,8 @@ static int dcn316_smu_send_msg_with_para
result = dcn316_smu_wait_for_response(clk_mgr, 10, 200000);
ASSERT(result == VBIOSSMC_Result_OK);
+ smu_print("SMU response after wait: %d\n", result);
+
if (result == VBIOSSMC_Status_BUSY) {
return -1;
}
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