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Message-ID: <20220914162302.GA2468487-robh@kernel.org>
Date:   Wed, 14 Sep 2022 11:23:02 -0500
From:   Rob Herring <robh@...nel.org>
To:     Siddharth Vadapalli <s-vadapalli@...com>
Cc:     davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
        pabeni@...hat.com, krzysztof.kozlowski@...aro.org,
        krzysztof.kozlowski+dt@...aro.org, linux@...linux.org.uk,
        vladimir.oltean@....com, grygorii.strashko@...com, vigneshr@...com,
        nsekhar@...com, netdev@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        kishon@...com
Subject: Re: [PATCH 1/8] dt-bindings: net: ti: k3-am654-cpsw-nuss: Update
 bindings for J721e CPSW9G

On Wed, Sep 14, 2022 at 03:20:46PM +0530, Siddharth Vadapalli wrote:
> Update bindings for TI K3 J721e SoC which contains 9 ports (8 external
> ports) CPSW9G module and add compatible for it.
> 
> Changes made:
>     - Add new compatible ti,j721e-cpswxg-nuss for CPSW9G.
>     - Extend pattern properties for new compatible.
>     - Change maximum number of CPSW ports to 8 for new compatible.
> 
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@...com>
> ---
>  .../bindings/net/ti,k3-am654-cpsw-nuss.yaml   | 23 +++++++++++++++++--
>  1 file changed, 21 insertions(+), 2 deletions(-)

What's the base for this patch? It didn't apply for me.

Run 'make dt_binding_check'. It should point out the issue I did. If 
not, let me know.

Rob

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