linux-kernel - Re: [PATCH 4.19 77/79] x86/nospec: Fix i386 RSB stuffing

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Message-ID: <c4dbfd1eea23b4495bb310dc78d174ef65adfc28.camel@decadent.org.uk>
Date:   Wed, 14 Sep 2022 20:46:00 +0200
From:   Ben Hutchings <ben@...adent.org.uk>
To:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        linux-kernel@...r.kernel.org
Cc:     stable@...r.kernel.org,
        "Peter Zijlstra (Intel)" <peterz@...radead.org>,
        Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
Subject: Re: [PATCH 4.19 77/79] x86/nospec: Fix i386 RSB stuffing

On Tue, 2022-09-13 at 16:07 +0200, Greg Kroah-Hartman wrote:
> From: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
> 
> From: Peter Zijlstra <peterz@...radead.org>
> 
> commit 332924973725e8cdcc783c175f68cf7e162cb9e5 upstream.

This should have only "From: Peter Zijlstra".

Ben.

> 
> Turns out that i386 doesn't unconditionally have LFENCE, as such the
> loop in __FILL_RETURN_BUFFER isn't actually speculation safe on such
> chips.
> 
> Fixes: ba6e31af2be9 ("x86/speculation: Add LFENCE to RSB fill sequence")
> Reported-by: Ben Hutchings <ben@...adent.org.uk>
> Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
> Link: https://lkml.kernel.org/r/Yv9tj9vbQ9nNlXoY@worktop.programming.kicks-ass.net
> [bwh: Backported to 4.19/5.4:
>  - __FILL_RETURN_BUFFER takes an sp parameter
>  - Open-code __FILL_RETURN_SLOT]
> Signed-off-by: Ben Hutchings <ben@...adent.org.uk>
> Signed-off-by: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
> Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
> ---
>  arch/x86/include/asm/nospec-branch.h |   14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> --- a/arch/x86/include/asm/nospec-branch.h
> +++ b/arch/x86/include/asm/nospec-branch.h
> @@ -35,6 +35,7 @@
>   * the optimal version — two calls, each with their own speculation
>   * trap should their return address end up getting used, in a loop.
>   */
> +#ifdef CONFIG_X86_64
>  #define __FILL_RETURN_BUFFER(reg, nr, sp)	\
>  	mov	$(nr/2), reg;			\
>  771:						\
> @@ -55,6 +56,19 @@
>  	add	$(BITS_PER_LONG/8) * nr, sp;	\
>  	/* barrier for jnz misprediction */	\
>  	lfence;
> +#else
> +/*
> + * i386 doesn't unconditionally have LFENCE, as such it can't
> + * do a loop.
> + */
> +#define __FILL_RETURN_BUFFER(reg, nr, sp)	\
> +	.rept nr;				\
> +	call	772f;				\
> +	int3;					\
> +772:;						\
> +	.endr;					\
> +	add	$(BITS_PER_LONG/8) * nr, sp;
> +#endif
>  
>  /* Sequence to mitigate PBRSB on eIBRS CPUs */
>  #define __ISSUE_UNBALANCED_RET_GUARD(sp)	\
> 
> 

-- 
Ben Hutchings
It is easier to change the specification to fit the program
than vice versa.

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