lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20220914165116.24f82d74@jacob-builder>
Date:   Wed, 14 Sep 2022 16:51:16 -0700
From:   Jacob Pan <jacob.jun.pan@...el.com>
To:     "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Cc:     Ashok Raj <ashok.raj@...el.com>,
        "Kirill A. Shutemov" <kirill@...temov.name>,
        Ashok Raj <ashok_raj@...ux.intel.com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        "Andy Lutomirski" <luto@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>, <x86@...nel.org>,
        Kostya Serebryany <kcc@...gle.com>,
        Andrey Ryabinin <ryabinin.a.a@...il.com>,
        Andrey Konovalov <andreyknvl@...il.com>,
        "Alexander Potapenko" <glider@...gle.com>,
        Taras Madan <tarasmadan@...gle.com>,
        "Dmitry Vyukov" <dvyukov@...gle.com>,
        "H . J . Lu" <hjl.tools@...il.com>,
        Andi Kleen <ak@...ux.intel.com>,
        Rick Edgecombe <rick.p.edgecombe@...el.com>,
        <linux-mm@...ck.org>, <linux-kernel@...r.kernel.org>,
        Jason Gunthorpe <jgg@...dia.com>,
        Joerg Roedel <joro@...tes.org>, jacob.jun.pan@...el.com
Subject: Re: [PATCHv8 00/11] Linear Address Masking enabling

Hi Kirill,

On Wed, 14 Sep 2022 18:45:32 +0300, "Kirill A. Shutemov"
<kirill.shutemov@...ux.intel.com> wrote:

> On Wed, Sep 14, 2022 at 08:31:56AM -0700, Ashok Raj wrote:
> > On Wed, Sep 14, 2022 at 06:18:18PM +0300, Kirill A. Shutemov wrote:  
> > > > > > > 
> > > > > > > The patch below implements something like this. It is PoC,
> > > > > > > build-tested only.
> > > > > > > 
> > > > > > > To be honest, I hate it. It is clearly a layering violation.
> > > > > > > It feels dirty. But I don't see any better way as we tie
> > > > > > > orthogonal features together.
> > > > > > > 
> > > > > > > Also I have no idea how to make forced PASID allocation if
> > > > > > > LAM enabled. What the API has to look like?  
> > > > > > 
> > > > > > Jacob, Ashok, any comment on this part?
> > > > > > 
> > > > > > I expect in many cases LAM will be enabled very early (like
> > > > > > before malloc is functinal) in process start and it makes PASID
> > > > > > allocation always fail.
> > > > > > 
> > > > > > Any way out?  
> > > > > 
> > > > > We need closure on this to proceed. Any clue?  
> > > > 
> > > > Failing PASID allocation seems like the right thing to do here. If
> > > > the application is explicitly allocating PASID's it can opt-out
> > > > using the similar mechanism you have for LAM enabling. So user takes
> > > > responsibility for sanitizing pointers. 
> > > > 
> > > > If some library is using an accelerator without application
> > > > knowledge, that would use the failure as a mechanism to use an
> > > > alternate path if one exists.
> > > > 
> > > > I don't know if both LAM and SVM need a separate forced opt-in (or i
> > > > don't have an opinion rather). Is this what you were asking? 
> > > > 
> > > > + Joerg, JasonG in case they have an opinion.  
> > > 
> > > My point is that the patch provides a way to override LAM vs. PASID
> > > mutual exclusion, but only if PASID allocated first. If we enabled
> > > LAM before PASID is allcoated there's no way to forcefully allocate
> > > PASID, bypassing LAM check. I think there should be one, no?  
> > 
> > Yes, we should have one for force enabling SVM too if the application
> > asks for forgiveness.   
> 
> What is the right API here?
> 
It seems very difficult to implement a UAPI for the applications to
override  at a runtime.  Currently, SVM bind  is under the control of
individual drivers. It could be at the time of open or some ioctl.

Perhaps,  this can be a platform policy via some commandline option. e.g.
intel_iommu=sva_lam_coexist.

Thanks,

Jacob

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ