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Message-ID: <20220914095628.26093-2-pshete@nvidia.com>
Date: Wed, 14 Sep 2022 15:26:26 +0530
From: Prathamesh Shete <pshete@...dia.com>
To: <adrian.hunter@...el.com>, <ulf.hansson@...aro.org>,
<thierry.reding@...il.com>, <jonathanh@...dia.com>,
<p.zabel@...gutronix.de>, <linux-mmc@...r.kernel.org>,
<linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: <anrao@...dia.com>, <smangipudi@...dia.com>, <pshete@...dia.com>,
<kyarlagadda@...dia.com>
Subject: [PATCH v2 2/4] mmc: sdhci-tegra: Add support to program MC streamID
As per T23x MSS IAS SMMU clients are supposed
to program streamid from their respective address spaces instead of MC
override
Define NVQUIRK_PROGRAM_MC_STREAMID and use it to program SMMU streamid
from the SDMMC client address space
Signed-off-by: Aniruddha TVS Rao <anrao@...dia.com>
Signed-off-by: Prathamesh Shete <pshete@...dia.com>
---
drivers/mmc/host/sdhci-tegra.c | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index a6c5bbae77b4..b66b0cc51497 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -25,6 +25,7 @@
#include <linux/mmc/slot-gpio.h>
#include <linux/gpio/consumer.h>
#include <linux/ktime.h>
+#include <linux/iommu.h>
#include <soc/tegra/common.h>
@@ -94,6 +95,8 @@
#define SDHCI_TEGRA_AUTO_CAL_STATUS 0x1ec
#define SDHCI_TEGRA_AUTO_CAL_ACTIVE BIT(31)
+#define SDHCI_TEGRA_CIF2AXI_CTRL_0 0x1fc
+
#define NVQUIRK_FORCE_SDHCI_SPEC_200 BIT(0)
#define NVQUIRK_ENABLE_BLOCK_GAP_DET BIT(1)
#define NVQUIRK_ENABLE_SDHCI_SPEC_300 BIT(2)
@@ -121,6 +124,7 @@
#define NVQUIRK_HAS_TMCLK BIT(10)
#define NVQUIRK_HAS_ANDROID_GPT_SECTOR BIT(11)
+#define NVQUIRK_PROGRAM_MC_STREAMID BIT(17)
/* SDMMC CQE Base Address for Tegra Host Ver 4.1 and Higher */
#define SDHCI_TEGRA_CQE_BASE_ADDR 0xF000
@@ -177,6 +181,7 @@ struct sdhci_tegra {
bool enable_hwcq;
unsigned long curr_clk_rate;
u8 tuned_tap_delay;
+ u32 streamid;
};
static u16 tegra_sdhci_readw(struct sdhci_host *host, int reg)
@@ -1564,6 +1569,7 @@ static const struct sdhci_tegra_soc_data soc_data_tegra234 = {
NVQUIRK_DIS_CARD_CLK_CONFIG_TAP |
NVQUIRK_ENABLE_SDR50 |
NVQUIRK_ENABLE_SDR104 |
+ NVQUIRK_PROGRAM_MC_STREAMID |
NVQUIRK_HAS_TMCLK,
.min_tap_delay = 95,
.max_tap_delay = 111,
@@ -1637,6 +1643,7 @@ static int sdhci_tegra_probe(struct platform_device *pdev)
struct sdhci_pltfm_host *pltfm_host;
struct sdhci_tegra *tegra_host;
struct clk *clk;
+ struct iommu_fwspec *fwspec;
int rc;
soc_data = of_device_get_match_data(&pdev->dev);
@@ -1775,6 +1782,23 @@ static int sdhci_tegra_probe(struct platform_device *pdev)
if (rc)
goto err_add_host;
+ /* Program MC streamID for DMA transfers */
+ if (soc_data->nvquirks & NVQUIRK_PROGRAM_MC_STREAMID) {
+ fwspec = dev_iommu_fwspec_get(&pdev->dev);
+ if (fwspec == NULL) {
+ rc = -ENODEV;
+ dev_err(mmc_dev(host->mmc),
+ "failed to get MC streamid: %d\n",
+ rc);
+ goto err_rst_get;
+ } else {
+ tegra_host->streamid = fwspec->ids[0] & 0xffff;
+ tegra_sdhci_writel(host, tegra_host->streamid |
+ (tegra_host->streamid << 8),
+ SDHCI_TEGRA_CIF2AXI_CTRL_0);
+ }
+ }
+
return 0;
err_add_host:
@@ -1861,6 +1885,8 @@ static int sdhci_tegra_suspend(struct device *dev)
static int sdhci_tegra_resume(struct device *dev)
{
struct sdhci_host *host = dev_get_drvdata(dev);
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);
int ret;
ret = mmc_gpio_set_cd_wake(host->mmc, false);
@@ -1871,6 +1897,13 @@ static int sdhci_tegra_resume(struct device *dev)
if (ret)
return ret;
+ /* Re-program MC streamID for DMA transfers */
+ if (tegra_host->soc_data->nvquirks & NVQUIRK_PROGRAM_MC_STREAMID) {
+ tegra_sdhci_writel(host, tegra_host->streamid |
+ (tegra_host->streamid << 8),
+ SDHCI_TEGRA_CIF2AXI_CTRL_0);
+ }
+
ret = sdhci_resume_host(host);
if (ret)
goto disable_clk;
--
2.17.1
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