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Date: Wed, 14 Sep 2022 16:22:55 +0200
From: Christian Marangi <ansuelsmth@...il.com>
To: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Alexey Dobriyan <adobriyan@...il.com>,
Takashi Iwai <tiwai@...e.de>,
Christian Brauner <brauner@...nel.org>,
Ranjani Sridharan <ranjani.sridharan@...ux.intel.com>,
Marc Herbert <marc.herbert@...el.com>,
Christian Marangi <ansuelsmth@...il.com>,
James Smart <jsmart2021@...il.com>,
Justin Tee <justin.tee@...adcom.com>,
Pierre-Louis Bossart <pierre-louis.bossart@...ux.intel.com>,
"Martin K. Petersen" <martin.petersen@...cle.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org
Subject: [PATCH v5 4/5] ARM: dts: qcom: fix various wrong definition for kpss-gcc node
Fix dtbs_check warning now that we have a correct kpss-gcc yaml
schema. Add additional qcom,kpss-gcc compatible to differentiate
devices where kpss-gcc should provide a clk and where kpss-gcc should
just provide the registers and the syscon phandle.
Add missing #clock-cells and remove useless clock-output-names for
ipq806x.
Add missing bindings for msm8960 and apq8064 kpss-gcc node.
Signed-off-by: Christian Marangi <ansuelsmth@...il.com>
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 5 ++++-
arch/arm/boot/dts/qcom-ipq8064.dtsi | 4 ++--
arch/arm/boot/dts/qcom-mdm9615.dtsi | 2 +-
arch/arm/boot/dts/qcom-msm8660.dtsi | 2 +-
arch/arm/boot/dts/qcom-msm8960.dtsi | 7 +++++--
5 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 257fcd497f86..ecf28260fd8c 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -845,8 +845,11 @@ mmcc: clock-controller@...0000 {
};
l2cc: clock-controller@...1000 {
- compatible = "qcom,kpss-gcc", "syscon";
+ compatible = "qcom,kpss-gcc-apq8064", "qcom,kpss-gcc", "syscon";
reg = <0x2011000 0x1000>;
+ clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
+ clock-names = "pll8_vote", "pxo";
+ #clock-cells = <0>;
};
rpm@...000 {
diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index a9bf2596a417..82c1483cd6ea 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -917,11 +917,11 @@ tcsr: syscon@...00000 {
};
l2cc: clock-controller@...1000 {
- compatible = "qcom,kpss-gcc", "syscon";
+ compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc", "syscon";
reg = <0x2011000 0x1000>;
clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
clock-names = "pll8_vote", "pxo";
- clock-output-names = "acpu_l2_aux";
+ #clock-cells = <0>;
};
lcc: clock-controller@...00000 {
diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi
index b47c86412de2..3a6bbe8a649c 100644
--- a/arch/arm/boot/dts/qcom-mdm9615.dtsi
+++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi
@@ -152,7 +152,7 @@ lcc: clock-controller@...00000 {
};
l2cc: clock-controller@...1000 {
- compatible = "qcom,kpss-gcc", "syscon";
+ compatible = "qcom,kpss-gcc-mdm9615", "qcom,kpss-gcc", "syscon";
reg = <0x02011000 0x1000>;
};
diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
index fd7751d4d886..7796f0e4746e 100644
--- a/arch/arm/boot/dts/qcom-msm8660.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
@@ -443,7 +443,7 @@ vibrator@4a {
};
l2cc: clock-controller@...2000 {
- compatible = "qcom,kpss-gcc", "syscon";
+ compatible = "qcom,kpss-gcc-msm8660", "qcom,kpss-gcc", "syscon";
reg = <0x02082000 0x1000>;
};
diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi
index a5f1eda707b5..98246e1b4f3f 100644
--- a/arch/arm/boot/dts/qcom-msm8960.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8960.dtsi
@@ -63,7 +63,7 @@ cxo_board {
clock-output-names = "cxo_board";
};
- pxo_board {
+ pxo_board: pxo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
@@ -148,8 +148,11 @@ clock-controller@...0000 {
};
l2cc: clock-controller@...1000 {
- compatible = "qcom,kpss-gcc", "syscon";
+ compatible = "qcom,kpss-gcc-msm8960", "qcom,kpss-gcc", "syscon";
reg = <0x2011000 0x1000>;
+ clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
+ clock-names = "pll8_vote", "pxo";
+ #clock-cells = <0>;
};
rpm: rpm@...000 {
--
2.37.2
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