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Message-Id: <20220915181558.354737-10-prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Thu, 15 Sep 2022 19:15:57 +0100
From: Prabhakar <prabhakar.csengg@...il.com>
To: Geert Uytterhoeven <geert+renesas@...der.be>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>
Cc: Heiko Stuebner <heiko@...ech.de>,
Atish Patra <atishp@...osinc.com>,
Conor Dooley <conor.dooley@...rochip.com>,
devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-renesas-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
Prabhakar <prabhakar.csengg@...il.com>,
Biju Das <biju.das.jz@...renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: [PATCH v3 09/10] MAINTAINERS: Add entry for Renesas RISC-V architecture
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Add RISC-V architecture as part of ARM/Renesas architecture, as they have
the same maintainers, use the same development collaboration
infrastructure, and share many files.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
---
v2->v3
* Merged as part of ARM
v1->v2
* New patch
---
MAINTAINERS | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index f5f17c50dac3..99483c13b91c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2665,7 +2665,7 @@ F: arch/arm/boot/dts/rtd*
F: arch/arm/mach-realtek/
F: arch/arm64/boot/dts/realtek/
-ARM/RENESAS ARCHITECTURE
+ARM/RISC-V/RENESAS ARCHITECTURE
M: Geert Uytterhoeven <geert+renesas@...der.be>
M: Magnus Damm <magnus.damm@...il.com>
L: linux-renesas-soc@...r.kernel.org
@@ -2686,6 +2686,7 @@ F: arch/arm/configs/shmobile_defconfig
F: arch/arm/include/debug/renesas-scif.S
F: arch/arm/mach-shmobile/
F: arch/arm64/boot/dts/renesas/
+F: arch/riscv/boot/dts/renesas/
F: drivers/soc/renesas/
F: include/linux/soc/renesas/
--
2.25.1
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