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Message-ID: <5815ce38-93f2-f6e4-2529-d6927d41ae16@microchip.com>
Date:   Thu, 15 Sep 2022 22:25:25 +0000
From:   <Conor.Dooley@...rochip.com>
To:     <prabhakar.csengg@...il.com>
CC:     <geert+renesas@...der.be>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <paul.walmsley@...ive.com>,
        <palmer@...belt.com>, <aou@...s.berkeley.edu>, <heiko@...ech.de>,
        <atishp@...osinc.com>, <devicetree@...r.kernel.org>,
        <linux-riscv@...ts.infradead.org>,
        <linux-renesas-soc@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <biju.das.jz@...renesas.com>,
        <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v3 05/10] RISC-V: Kconfig.socs: Add Renesas RZ/Five SoC
 kconfig option



On 15/09/2022 23:18, Lad, Prabhakar wrote:
> Hi Conor,
> 
> Thank you for the review.
> 
> On Thu, Sep 15, 2022 at 9:59 PM <Conor.Dooley@...rochip.com> wrote:
>>
>> On 15/09/2022 19:15, Prabhakar wrote:
>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>>
>>> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>>>
>>> Introduce SOC_RENESAS_RZFIVE config option to enable Renesas RZ/Five
>>> (R9A07G043) SoC, along side also add ARCH_RENESAS config option as most
>>> of the Renesas drivers depend on this config option.
>>>
>>> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>>> Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
>>> ---
>>> v2->v3
>>> * Included RB tag from Geert
>>>
>>> v1->v2
>>> * No Change
>>> ---
>>>  arch/riscv/Kconfig.socs | 14 ++++++++++++++
>>>  1 file changed, 14 insertions(+)
>>>
>>> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
>>> index 69774bb362d6..91b7f38b77a8 100644
>>> --- a/arch/riscv/Kconfig.socs
>>> +++ b/arch/riscv/Kconfig.socs
>>> @@ -80,4 +80,18 @@ config SOC_CANAAN_K210_DTB_SOURCE
>>>
>>>  endif # SOC_CANAAN
>>>
>>> +config ARCH_RENESAS
>>> +       bool
>>> +       select GPIOLIB
>>> +       select PINCTRL
>>> +       select SOC_BUS
>>
>> Do you really need to select SOC_BUS?
>> Noone else does on RISC-V, hence my curiosity.
>>
> Yes we do need SOC_BUS due to soc_device_register() call in [0].
> Digging further I realized we can drop the above SOC_BUS as
> SOC_RENESAS is selecting SOC_BUS [1]
> 
> [0] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/soc/renesas/renesas-soc.c?h=v6.0-rc5#n487
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/soc/renesas/Kconfig?h=v6.0-rc5#n5
> 
>>> +
>>> +config SOC_RENESAS_RZFIVE
>>> +       bool "Renesas RZ/Five SoC"
>>> +       select ARCH_R9A07G043
>>> +       select ARCH_RENESAS
>>> +       select RESET_CONTROLLER
>>> +       help
>>> +         This enables support for Renesas RZ/Five SoC.
>>
>> :thinking: isn't this pretty much what we decided not to do?
>> And instead you would redefine ARCH_RENESAS in this file and
>> not use SOC_RENESAS* at all? Will save me having to purge the
>> the SOC symbol when I do the conversion.
>>
> I was under the impression we didn't come to a conclusion so kept the

Might've been a good idea if I did a summary as I finished..
I guess I'll post one to the list tomorrow if I remember.

> patch as is. I'll just make ARCH_RENESAS visible as Geert suggested
> something like below:
> 
>         config ARCH_RENESAS
>             bool "Renesas RISC-V SoCs"
>             select GPIOLIB
>             select PINCTRL
>             select RESET_CONTROLLER
> 
> 
> Cheers,
> Prabhakar

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