linux-kernel - [PATCH v2 5/9] arm64: dts: ls1046a: make dma-coherent global to the SoC

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Message-Id: <20220915233432.31660-6-leoyang.li@nxp.com>
Date:   Thu, 15 Sep 2022 18:34:28 -0500
From:   Li Yang <leoyang.li@....com>
To:     shawnguo@...nel.org, devicetree@...r.kernel.org
Cc:     robh+dt@...nel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, Li Yang <leoyang.li@....com>,
        Laurentiu Tudor <laurentiu.tudor@....com>
Subject: [PATCH v2 5/9] arm64: dts: ls1046a: make dma-coherent global to the SoC

These SoCs are really completely dma coherent in their entirety so add
the dma-coherent property at the soc level in the device tree and drop
the instances where it's specifically added to a few select devices.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@....com>
Signed-off-by: Li Yang <leoyang.li@....com>
---
 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 27033c558e3e..e406499a26b4 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -273,6 +273,7 @@ soc: soc {
 		#size-cells = <2>;
 		ranges;
 		dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
+		dma-coherent;
 
 		ddr: memory-controller@...0000 {
 			compatible = "fsl,qoriq-memory-controller";
@@ -355,7 +356,6 @@ crypto: crypto@...0000 {
 			ranges = <0x0 0x00 0x1700000 0x100000>;
 			reg = <0x00 0x1700000 0x0 0x100000>;
 			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
-			dma-coherent;
 
 			sec_jr0: jr@...00 {
 				compatible = "fsl,sec-v5.4-job-ring",
@@ -794,7 +794,6 @@ pcie1: pcie@...0000 {
 			#address-cells = <3>;
 			#size-cells = <2>;
 			device_type = "pci";
-			dma-coherent;
 			num-viewport = <8>;
 			bus-range = <0x0 0xff>;
 			ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */
@@ -834,7 +833,6 @@ pcie2: pcie@...0000 {
 			#address-cells = <3>;
 			#size-cells = <2>;
 			device_type = "pci";
-			dma-coherent;
 			num-viewport = <8>;
 			bus-range = <0x0 0xff>;
 			ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000   /* downstream I/O */
@@ -874,7 +872,6 @@ pcie3: pcie@...0000 {
 			#address-cells = <3>;
 			#size-cells = <2>;
 			device_type = "pci";
-			dma-coherent;
 			num-viewport = <8>;
 			bus-range = <0x0 0xff>;
 			ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000   /* downstream I/O */
-- 
2.37.1