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Message-ID: <20220915094640.5571-5-rex-bc.chen@mediatek.com>
Date: Thu, 15 Sep 2022 17:46:40 +0800
From: Bo-Chen Chen <rex-bc.chen@...iatek.com>
To: <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>
CC: <matthias.bgg@...il.com>,
<angelogioacchino.delregno@...labora.com>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
<Project_Global_Chrome_Upstream_Group@...iatek.com>,
Bo-Chen Chen <rex-bc.chen@...iatek.com>
Subject: [PATCH v2 4/4] arm64: dts: mediatek: cherry: Add edptx and dptx support
In cherry projects, we use edptx as the internal display interface
and use dptx as the external display interface. To support this, we
need to add more properties.
- Add pinctrls for edptx and dptx.
- Add ports for edptx and dptx.
The port connections for the internal and external display:
dp-intf0 -> edptx -> panel
dp-intf1 -> dptx
Because it lacks port of panel, so we keep empty remote-endpoint for
port1@...tx.
Signed-off-by: Bo-Chen Chen <rex-bc.chen@...iatek.com>
---
.../boot/dts/mediatek/mt8195-cherry.dtsi | 68 +++++++++++++++++++
1 file changed, 68 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
index 303dc32c64dc..560103e29017 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
@@ -125,6 +125,7 @@
port {
dp_intf0_out: endpoint {
+ remote-endpoint = <&edp_in>;
};
};
};
@@ -134,6 +135,59 @@
port {
dp_intf1_out: endpoint {
+ remote-endpoint = <&dptx_in>;
+ };
+ };
+};
+
+&edp_tx {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&edptx_pins_default>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ edp_in: endpoint {
+ remote-endpoint = <&dp_intf0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ edp_out: endpoint {
+ data-lanes = <0 1 2 3>;
+ };
+ };
+ };
+};
+
+&dp_tx {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&dptx_pin>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dptx_in: endpoint {
+ remote-endpoint = <&dp_intf1_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dptx_out: endpoint {
+ data-lanes = <0 1 2 3>;
+ };
};
};
};
@@ -497,6 +551,20 @@
};
};
+ edptx_pins_default: edptx-default-pins {
+ pins-cmd-dat {
+ pinmux = <PINMUX_GPIO7__FUNC_EDP_TX_HPD>;
+ bias-pull-up;
+ };
+ };
+
+ dptx_pin: dptx-default-pins {
+ pins-cmd-dat {
+ pinmux = <PINMUX_GPIO18__FUNC_DP_TX_HPD>;
+ bias-pull-up;
+ };
+ };
+
i2c0_pins: i2c0-default-pins {
pins-bus {
pinmux = <PINMUX_GPIO8__FUNC_SDA0>,
--
2.18.0
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