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Message-ID: <20220916191903.GA1109317-robh@kernel.org>
Date: Fri, 16 Sep 2022 14:19:03 -0500
From: Rob Herring <robh@...nel.org>
To: Christian Marangi <ansuelsmth@...il.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Alexey Dobriyan <adobriyan@...il.com>,
Takashi Iwai <tiwai@...e.de>,
Christian Brauner <brauner@...nel.org>,
Ranjani Sridharan <ranjani.sridharan@...ux.intel.com>,
Marc Herbert <marc.herbert@...el.com>,
James Smart <jsmart2021@...il.com>,
Justin Tee <justin.tee@...adcom.com>,
Pierre-Louis Bossart <pierre-louis.bossart@...ux.intel.com>,
"Martin K. Petersen" <martin.petersen@...cle.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH v5 3/5] dt-bindings: arm: msm: Rework kpss-gcc driver
Documentation to yaml
On Wed, Sep 14, 2022 at 04:22:54PM +0200, Christian Marangi wrote:
> Rework kpss-gcc driver Documentation to yaml Documentation.
> The current kpss-gcc Documentation have major problems and can't be
> converted directly. Introduce various changes to the original
> Documentation.
>
> Add #clock-cells additional binding as this clock outputs a static clk
> named acpu_l2_aux with supported compatible.
> Only some compatible require and outputs a clock, for the others, set
> only the reg as a required binding to correctly export the kpss-gcc
> registers. As the reg is shared also add the required syscon compatible.
>
> Signed-off-by: Christian Marangi <ansuelsmth@...il.com>
> ---
> .../bindings/arm/msm/qcom,kpss-gcc.txt | 44 ---------
> .../bindings/arm/msm/qcom,kpss-gcc.yaml | 90 +++++++++++++++++++
Please move to bindings/clock/
Same comments as the other one.
> 2 files changed, 90 insertions(+), 44 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt
> create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml
> diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml
> new file mode 100644
> index 000000000000..27f7df7e3ec4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml
> @@ -0,0 +1,90 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/msm/qcom,kpss-gcc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Krait Processor Sub-system (KPSS) Global Clock Controller (GCC)
> +
> +maintainers:
> + - Christian Marangi <ansuelsmth@...il.com>
> +
> +description: |
> + Krait Processor Sub-system (KPSS) Global Clock Controller (GCC). Used
> + to control L2 mux (in the current implementation) and provide access
> + to the kpss-gcc registers.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - qcom,kpss-gcc-ipq8064
> + - qcom,kpss-gcc-apq8064
> + - qcom,kpss-gcc-msm8974
> + - qcom,kpss-gcc-msm8960
> + - qcom,kpss-gcc-msm8660
> + - qcom,kpss-gcc-mdm9615
> + - const: qcom,kpss-gcc
> + - const: syscon
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: phandle to pll8_vote
> + - description: phandle to pxo_board
> +
> + clock-names:
> + items:
> + - const: pll8_vote
> + - const: pxo
> +
> + '#clock-cells':
> + const: 0
> +
> +required:
> + - compatible
> + - reg
> +
> +if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,kpss-gcc-ipq8064
> + - qcom,kpss-gcc-apq8064
> + - qcom,kpss-gcc-msm8974
> + - qcom,kpss-gcc-msm8960
> +then:
> + required:
> + - clocks
> + - clock-names
> + - '#clock-cells'
> +else:
> + properties:
> + clock: false
> + clock-names: false
> + '#clock-cells': false
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
> +
> + clock-controller@...1000 {
> + compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc", "syscon";
> + reg = <0x2011000 0x1000>;
> + clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
> + clock-names = "pll8_vote", "pxo";
> + #clock-cells = <0>;
> + };
> +
> + - |
> + clock-controller@...1000 {
> + compatible = "qcom,kpss-gcc-mdm9615", "qcom,kpss-gcc", "syscon";
> + reg = <0x02011000 0x1000>;
> + };
> +...
> +
> --
> 2.37.2
>
>
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