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Message-ID: <CAAhSdy1iDXMhE_MVdj9JDu8XHXiV_Ci=aLVqQG7r-m6d28aAdw@mail.gmail.com>
Date: Fri, 16 Sep 2022 10:28:56 +0530
From: Anup Patel <anup@...infault.org>
To: Anup Patel <apatel@...tanamicro.com>
Cc: Paolo Bonzini <pbonzini@...hat.com>,
Atish Patra <atishp@...shpatra.org>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>, kvm@...r.kernel.org,
kvm-riscv@...ts.infradead.org, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/3] Svinval support for KVM RISC-V
On Fri, Sep 2, 2022 at 10:31 PM Anup Patel <apatel@...tanamicro.com> wrote:
>
> This series adds Svinval extension support for both Host hypervisor
> and Guest.
>
> These patches can also be found in riscv_kvm_svinval_v1 branch at:
> https://github.com/avpatel/linux.git
>
> The corresponding KVMTOOL patches are available in riscv_svinval_v1
> branch at: https://github.com/avpatel/kvmtool.git
>
> Anup Patel (2):
> RISC-V: KVM: Use Svinval for local TLB maintenance when available
> RISC-V: KVM: Allow Guest use Svinval extension
>
> Mayuresh Chitale (1):
> RISC-V: Probe Svinval extension form ISA string
I have queued this series for 6.1
Thanks,
Anup
>
> arch/riscv/include/asm/hwcap.h | 4 +++
> arch/riscv/include/asm/insn-def.h | 20 +++++++++++
> arch/riscv/include/uapi/asm/kvm.h | 1 +
> arch/riscv/kernel/cpu.c | 1 +
> arch/riscv/kernel/cpufeature.c | 1 +
> arch/riscv/kvm/tlb.c | 60 ++++++++++++++++++++++++-------
> arch/riscv/kvm/vcpu.c | 2 ++
> 7 files changed, 77 insertions(+), 12 deletions(-)
>
> --
> 2.34.1
>
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