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Message-Id: <20220918155246.1203293-12-guoren@kernel.org>
Date: Sun, 18 Sep 2022 11:52:46 -0400
From: guoren@...nel.org
To: arnd@...db.de, guoren@...nel.org, palmer@...osinc.com,
tglx@...utronix.de, peterz@...radead.org, luto@...nel.org,
conor.dooley@...rochip.com, heiko@...ech.de, jszhang@...nel.org,
lazyparser@...il.com, falcon@...ylab.org, chenhuacai@...nel.org,
apatel@...tanamicro.com, atishp@...shpatra.org, palmer@...belt.com,
paul.walmsley@...ive.com, mark.rutland@....com,
zouyipeng@...wei.com, bigeasy@...utronix.de,
David.Laight@...lab.com
Cc: linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org, Dao Lu <daolu@...osinc.com>,
Xianting Tian <xianting.tian@...ux.alibaba.com>,
Conor Dooley <Conor.Dooley@...rochip.com>
Subject: [PATCH V5 11/11] riscv: Add support for STACKLEAK gcc plugin
From: Dao Lu <daolu@...osinc.com>
Add support for STACKLEAK gcc plugin to riscv by implementing
stackleak_check_alloca, based heavily on the arm64 version, and
modifying the entry.S. Additionally, this disables the plugin for EFI
stub code for riscv. All modifications base on generic_entry.
Link: https://lore.kernel.org/linux-riscv/20220615213834.3116135-1-daolu@rivosinc.com/
Signed-off-by: Dao Lu <daolu@...osinc.com>
Co-developed-by: Xianting Tian <xianting.tian@...ux.alibaba.com>
Signed-off-by: Xianting Tian <xianting.tian@...ux.alibaba.com>
Co-developed-by: Guo Ren <guoren@...nel.org>
Signed-off-by: Guo Ren <guoren@...nel.org>
Cc: Conor Dooley <Conor.Dooley@...rochip.com>
Cc: Mark Rutland <mark.rutland@....com>
---
arch/riscv/Kconfig | 1 +
arch/riscv/kernel/entry.S | 8 +++++++-
drivers/firmware/efi/libstub/Makefile | 2 +-
3 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 8241b12399d7..b4476f17fed6 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -81,6 +81,7 @@ config RISCV
select HAVE_ARCH_MMAP_RND_BITS if MMU
select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT
select HAVE_ARCH_SECCOMP_FILTER
+ select HAVE_ARCH_STACKLEAK
select HAVE_ARCH_TRACEHOOK
select HAVE_ARCH_TRANSPARENT_HUGEPAGE if 64BIT && MMU
select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
index 426529b84db0..2207cf44a3bc 100644
--- a/arch/riscv/kernel/entry.S
+++ b/arch/riscv/kernel/entry.S
@@ -130,7 +130,6 @@ END(handle_exception)
ENTRY(ret_from_exception)
REG_L s0, PT_STATUS(sp)
- csrc CSR_STATUS, SR_IE
#ifdef CONFIG_RISCV_M_MODE
/* the MPP value is too large to be used as an immediate arg for addi */
li t0, SR_MPP
@@ -139,6 +138,9 @@ ENTRY(ret_from_exception)
andi s0, s0, SR_SPP
#endif
bnez s0, 1f
+#ifdef CONFIG_GCC_PLUGIN_STACKLEAK
+ call stackleak_erase
+#endif
/* Save unwound kernel stack pointer in thread_info */
addi s0, sp, PT_SIZE_ON_STACK
@@ -148,8 +150,12 @@ ENTRY(ret_from_exception)
* Save TP into the scratch register , so we can find the kernel data
* structures again.
*/
+ csrc CSR_STATUS, SR_IE
csrw CSR_SCRATCH, tp
+ j 2f
1:
+ csrc CSR_STATUS, SR_IE
+2:
/*
* The current load reservation is effectively part of the processor's
* state, in the sense that load reservations cannot be shared between
diff --git a/drivers/firmware/efi/libstub/Makefile b/drivers/firmware/efi/libstub/Makefile
index d0537573501e..5e1fc4f82883 100644
--- a/drivers/firmware/efi/libstub/Makefile
+++ b/drivers/firmware/efi/libstub/Makefile
@@ -25,7 +25,7 @@ cflags-$(CONFIG_ARM) := $(subst $(CC_FLAGS_FTRACE),,$(KBUILD_CFLAGS)) \
-fno-builtin -fpic \
$(call cc-option,-mno-single-pic-base)
cflags-$(CONFIG_RISCV) := $(subst $(CC_FLAGS_FTRACE),,$(KBUILD_CFLAGS)) \
- -fpic
+ -fpic $(DISABLE_STACKLEAK_PLUGIN)
cflags-$(CONFIG_EFI_GENERIC_STUB) += -I$(srctree)/scripts/dtc/libfdt
--
2.36.1
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