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Message-ID: <6499fa0e-3e07-85b4-0800-849db7c2593b@linaro.org>
Date:   Mon, 19 Sep 2022 14:53:51 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Piyush Mehta <piyush.mehta@....com>, gregkh@...uxfoundation.org,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        balbi@...nel.org, linux-usb@...r.kernel.org
Cc:     devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        git@....com, michal.simek@....com,
        siva.durga.prasad.paladugu@....com,
        Piyush Mehta <piyush.mehta@...inx.com>
Subject: Re: [PATCH V2 1/2] dt-bindings: usb: snps,dwc3: Add
 'snps,resume-hs-terminations' quirk

On 19/09/2022 12:48, Piyush Mehta wrote:
> From: Piyush Mehta <piyush.mehta@...inx.com>
> 
> Add a new 'snps,resume-hs-terminations' DT quirk to dwc3 core to resolved
> issue of CRC failed error.
> 
> On the resume path, U3/U2 exit controller fails to send proper CRC checksum
> in CRC5 field. As result Transaction Error is generated. Enabling bit 10 of
> GUCTL1 will correct this problem.
> 
> When this bit is set to '1', the UTMI/ULPI opmode will be changed to
> "normal" along with HS terminations and term/xcvr select signals after EOR.
> This option is to support certain legacy UTMI/ULPI PHYs.
> 
> Signed-off-by: Piyush Mehta <piyush.mehta@...inx.com>
> Signed-off-by: Piyush Mehta <piyush.mehta@....com>

Only one SoB is needed for one person. For example switch to amd.com
(with ownership of commit) or skip second SoB.

> ---
> Changes in V2:
> - Addressed Krzysztof Kozlowski review comments
>  - Update the quirk name and No underscores in properties.
>  - Modified the quirk description. 
> Link: https://lore.kernel.org/all/e15168ac-b5a1-0c15-cfb3-34fb518e737f@linaro.org/
> ---
>  Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 7 +++++++
>  1 file changed, 7 insertions(+)
> 


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>


Best regards,
Krzysztof

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