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Message-ID: <166359395235.401.11910910505403542234.tip-bot2@tip-bot2>
Date: Mon, 19 Sep 2022 13:25:52 -0000
From: "tip-bot2 for Sebastian Andrzej Siewior" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Sebastian Andrzej Siewior <bigeasy@...utronix.de>,
Thomas Gleixner <tglx@...utronix.de>, x86@...nel.org,
linux-kernel@...r.kernel.org, maz@...nel.org
Subject: [tip: irq/core] pinctrl: amd: Use generic_handle_irq_safe()
The following commit has been merged into the irq/core branch of tip:
Commit-ID: f460c70125bcb1b753f152d9d0c9cee3ddbc2d91
Gitweb: https://git.kernel.org/tip/f460c70125bcb1b753f152d9d0c9cee3ddbc2d91
Author: Sebastian Andrzej Siewior <bigeasy@...utronix.de>
AuthorDate: Mon, 19 Sep 2022 14:42:54 +02:00
Committer: Thomas Gleixner <tglx@...utronix.de>
CommitterDate: Mon, 19 Sep 2022 15:08:38 +02:00
pinctrl: amd: Use generic_handle_irq_safe()
On PREEMPT_RT enabled kernels the demultiplex interrupt handler is force
threaded and runs with interrupts enabled. The invocation of
generic_handle_domain_irq() with interrupts enabled triggers a lockdep
warning due to a non-irq safe lock acquisition.
Instead of disabling interrupts on the driver level, use
generic_handle_domain_irq_safe().
[ tglx: Split out from combo patch ]
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@...utronix.de>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Link: https://lore.kernel.org/r/YnkfWFzvusFFktSt@linutronix.de
Link: https://bugzilla.kernel.org/show_bug.cgi?id=215954
---
drivers/pinctrl/pinctrl-amd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
index 4691a33..4ed2b4b 100644
--- a/drivers/pinctrl/pinctrl-amd.c
+++ b/drivers/pinctrl/pinctrl-amd.c
@@ -639,7 +639,7 @@ static bool do_amd_gpio_irq_handler(int irq, void *dev_id)
if (!(regval & PIN_IRQ_PENDING) ||
!(regval & BIT(INTERRUPT_MASK_OFF)))
continue;
- generic_handle_domain_irq(gc->irq.domain, irqnr + i);
+ generic_handle_domain_irq_safe(gc->irq.domain, irqnr + i);
/* Clear interrupt.
* We must read the pin register again, in case the
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