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Message-ID: <YyScSCcXOT9/KD5w@smile.fi.intel.com>
Date: Mon, 19 Sep 2022 16:59:40 +0300
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Jan Dabros <jsd@...ihalf.com>
Cc: linux-kernel@...r.kernel.org, linux-i2c@...r.kernel.org,
jarkko.nikula@...ux.intel.com, wsa@...nel.org,
rrangel@...omium.org, upstream@...ihalf.com,
mario.limonciello@....com
Subject: Re: [PATCH -next 1/2] i2c: designware: Switch from using MMIO access
to SMN access
On Fri, Sep 16, 2022 at 03:18:53PM +0200, Jan Dabros wrote:
> Due to a change in silicon compared to Cezanne, in future revisions MSR
> access can't be used to get the base address of the PSP MMIO region that
> contains the PSP mailbox interface.
>
> Modify driver to use SMN access also for Cezanne platforms (it is
> working there) in order to simplify codebase when adding support for new
> SoC versions.
>
> Export amd_cache_northbridges() which was unexported by
> e1907d3: "x86/amd_nb: Unexport amd_cache_northbridges()"
Please, use standard format of referring to the commits in the history
(basically the same as for Fixes tags).
> since function which registers i2c-designware-platdrv is a
> subsys_initcall that is executed before fs_initcall (when enumeration of
> NB descriptors occurs). Thus in order to use SMN accesses it's necessary
> to explicitly call amd_cache_northrbidges() from within this driver.
Also it doesn't clarify if this commit a full revert of that (rebased for
new kernel versions) or partial or functional?
--
With Best Regards,
Andy Shevchenko
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