[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20220919143340.4527-2-vidyas@nvidia.com>
Date: Mon, 19 Sep 2022 20:03:39 +0530
From: Vidya Sagar <vidyas@...dia.com>
To: <jingoohan1@...il.com>, <gustavo.pimentel@...opsys.com>,
<lpieralisi@...nel.org>, <robh@...nel.org>, <kw@...ux.com>,
<bhelgaas@...gle.com>
CC: <linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<kthota@...dia.com>, <mmaddireddy@...dia.com>, <vidyas@...dia.com>,
<sagar.tv@...il.com>
Subject: [PATCH V1 1/2] PCI: Add PCI_PTM_CAP_RES macro
Add macro defining Responder capable bit in Precision Time Measurement
capability register.
Signed-off-by: Vidya Sagar <vidyas@...dia.com>
---
include/uapi/linux/pci_regs.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index 57b8e2ffb1dd..1c3591c8e09e 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -1058,6 +1058,7 @@
/* Precision Time Measurement */
#define PCI_PTM_CAP 0x04 /* PTM Capability */
#define PCI_PTM_CAP_REQ 0x00000001 /* Requester capable */
+#define PCI_PTM_CAP_RES 0x00000002 /* Responder capable */
#define PCI_PTM_CAP_ROOT 0x00000004 /* Root capable */
#define PCI_PTM_GRANULARITY_MASK 0x0000FF00 /* Clock granularity */
#define PCI_PTM_CTRL 0x08 /* PTM Control */
--
2.17.1
Powered by blists - more mailing lists