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Message-ID: <20220919150846.1148783-7-sergiu.moga@microchip.com>
Date: Mon, 19 Sep 2022 18:08:44 +0300
From: Sergiu Moga <sergiu.moga@...rochip.com>
To: <lee@...nel.org>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <nicolas.ferre@...rochip.com>,
<alexandre.belloni@...tlin.com>, <claudiu.beznea@...rochip.com>,
<radu_nicolae.pirea@....ro>, <richard.genoud@...il.com>,
<gregkh@...uxfoundation.org>, <jirislaby@...nel.org>,
<kavyasree.kotagiri@...rochip.com>
CC: <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-spi@...r.kernel.org>,
<linux-serial@...r.kernel.org>,
Sergiu Moga <sergiu.moga@...rochip.com>
Subject: [PATCH v4 6/9] tty: serial: atmel: Define GCLK as USART baudrate source clock
Define the bit that represents the choice of having GCLK as a baudrate
source clock inside the USCLKS bitmask of the Mode Register of
USART IP's.
Signed-off-by: Sergiu Moga <sergiu.moga@...rochip.com>
---
v1 -> v2:
- Nothing, this patch was not here before
v2 -> v3:
- Nothing
v3 -> v4:
- Nothing, this was previously [PATCH 10]
drivers/tty/serial/atmel_serial.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/tty/serial/atmel_serial.h b/drivers/tty/serial/atmel_serial.h
index 0d8a0f9cc5c3..70d0611e56fd 100644
--- a/drivers/tty/serial/atmel_serial.h
+++ b/drivers/tty/serial/atmel_serial.h
@@ -49,6 +49,7 @@
#define ATMEL_US_USCLKS GENMASK(5, 4) /* Clock Selection */
#define ATMEL_US_USCLKS_MCK (0 << 4)
#define ATMEL_US_USCLKS_MCK_DIV8 (1 << 4)
+#define ATMEL_US_USCLKS_GCLK (2 << 4)
#define ATMEL_US_USCLKS_SCK (3 << 4)
#define ATMEL_US_CHRL GENMASK(7, 6) /* Character Length */
#define ATMEL_US_CHRL_5 (0 << 6)
--
2.34.1
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