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Message-ID: <c86d39c9-82d2-0f9f-9836-76ad3b6d8ede@linaro.org>
Date: Mon, 19 Sep 2022 18:10:51 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: "Viorel Suman (OSS)" <viorel.suman@....nxp.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
Viorel Suman <viorel.suman@....com>,
Shenwei Wang <shenwei.wang@....com>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3] dt-bindings: firmware: imx: sync with SCFW kit v1.13.0
On 19/09/2022 15:22, Viorel Suman (OSS) wrote:
> From: Viorel Suman <viorel.suman@....com>
>
> Sync defines with the latest available SCFW kit version 1.13.0,
> may be found at the address below:
>
> https://www.nxp.com/webapp/Download?colCode=L5.15.32_2.0.0_SCFWKIT-1.13.0&appType=license
>
> Signed-off-by: Viorel Suman <viorel.suman@....com>
> ---
> include/dt-bindings/firmware/imx/rsrc.h | 294 ++++++++++++++++--------
> 1 file changed, 198 insertions(+), 96 deletions(-)
>
> Changes since v1: https://lore.kernel.org/all/20220915181805.424670-1-viorel.suman@oss.nxp.com/
> Two patches squashed into one in order to keep changes bissectable
> and compilable as suggested by Alexander Stein.
>
> Changes since v2: https://lore.kernel.org/all/20220919113715.243910-1-viorel.suman@oss.nxp.com/
> Added two more defines in backward compatibility section in order to
> to avoid breaking ABI, so there is no need to change the driver
> anymore.
>
> diff --git a/include/dt-bindings/firmware/imx/rsrc.h b/include/dt-bindings/firmware/imx/rsrc.h
> index 1675de05ad33..ed33869f184e 100644
> --- a/include/dt-bindings/firmware/imx/rsrc.h
> +++ b/include/dt-bindings/firmware/imx/rsrc.h
> @@ -13,30 +13,30 @@
> * never be changed or removed (only added to at the end of the list).
> */
>
> -#define IMX_SC_R_A53 0
> -#define IMX_SC_R_A53_0 1
> -#define IMX_SC_R_A53_1 2
> -#define IMX_SC_R_A53_2 3
> -#define IMX_SC_R_A53_3 4
> -#define IMX_SC_R_A72 5
> -#define IMX_SC_R_A72_0 6
> -#define IMX_SC_R_A72_1 7
> -#define IMX_SC_R_A72_2 8
> -#define IMX_SC_R_A72_3 9
> +#define IMX_SC_R_AP_0 0
> +#define IMX_SC_R_AP_0_0 1
> +#define IMX_SC_R_AP_0_1 2
> +#define IMX_SC_R_AP_0_2 3
> +#define IMX_SC_R_AP_0_3 4
> +#define IMX_SC_R_AP_1 5
> +#define IMX_SC_R_AP_1_0 6
> +#define IMX_SC_R_AP_1_1 7
> +#define IMX_SC_R_AP_1_2 8
> +#define IMX_SC_R_AP_1_3 9
> #define IMX_SC_R_CCI 10
> #define IMX_SC_R_DB 11
> #define IMX_SC_R_DRC_0 12
> #define IMX_SC_R_DRC_1 13
> #define IMX_SC_R_GIC_SMMU 14
> -#define IMX_SC_R_IRQSTR_M4_0 15
> -#define IMX_SC_R_IRQSTR_M4_1 16
> -#define IMX_SC_R_SMMU 17
> -#define IMX_SC_R_GIC 18
> +#define IMX_SC_R_IRQSTR_MCU_0 15
> +#define IMX_SC_R_IRQSTR_MCU_1 16
> +#define IMX_SC_R_SMMU_0 17
> +#define IMX_SC_R_GIC_0 18
> #define IMX_SC_R_DC_0_BLIT0 19
> #define IMX_SC_R_DC_0_BLIT1 20
> #define IMX_SC_R_DC_0_BLIT2 21
> #define IMX_SC_R_DC_0_BLIT_OUT 22
> -#define IMX_SC_R_PERF 23
> +#define IMX_SC_R_PERF_0 23
> #define IMX_SC_R_USB_1_PHY 24
> #define IMX_SC_R_DC_0_WARP 25
> #define IMX_SC_R_V2X_MU_0 26
> @@ -56,11 +56,14 @@
> #define IMX_SC_R_V2X_MU_3 40
> #define IMX_SC_R_V2X_MU_4 41
> #define IMX_SC_R_DC_1_WARP 42
> +#define IMX_SC_R_STM 43
> #define IMX_SC_R_SECVIO 44
> #define IMX_SC_R_DC_1_VIDEO0 45
> #define IMX_SC_R_DC_1_VIDEO1 46
> #define IMX_SC_R_DC_1_FRAC0 47
> +#define IMX_SC_R_V2X 48
> #define IMX_SC_R_DC_1 49
> +#define IMX_SC_R_UNUSED14 50
> #define IMX_SC_R_DC_1_PLL_0 51
> #define IMX_SC_R_DC_1_PLL_1 52
> #define IMX_SC_R_SPI_0 53
> @@ -151,10 +154,10 @@
> #define IMX_SC_R_DMA_1_CH29 137
> #define IMX_SC_R_DMA_1_CH30 138
> #define IMX_SC_R_DMA_1_CH31 139
> -#define IMX_SC_R_UNUSED1 140
This one disappears...
> -#define IMX_SC_R_UNUSED2 141
> -#define IMX_SC_R_UNUSED3 142
> -#define IMX_SC_R_UNUSED4 143
Best regards,
Krzysztof
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