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Message-ID: <15741fdf-68b6-bd32-b0c2-63fde3bb0db2@intel.com>
Date: Tue, 20 Sep 2022 09:06:32 -0700
From: Dave Hansen <dave.hansen@...el.com>
To: Jason Gunthorpe <jgg@...dia.com>,
"Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Cc: Jacob Pan <jacob.jun.pan@...el.com>,
Ashok Raj <ashok.raj@...el.com>,
"Kirill A. Shutemov" <kirill@...temov.name>,
Ashok Raj <ashok_raj@...ux.intel.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Andy Lutomirski <luto@...nel.org>,
Peter Zijlstra <peterz@...radead.org>, x86@...nel.org,
Kostya Serebryany <kcc@...gle.com>,
Andrey Ryabinin <ryabinin.a.a@...il.com>,
Andrey Konovalov <andreyknvl@...il.com>,
Alexander Potapenko <glider@...gle.com>,
Taras Madan <tarasmadan@...gle.com>,
Dmitry Vyukov <dvyukov@...gle.com>,
"H . J . Lu" <hjl.tools@...il.com>,
Andi Kleen <ak@...ux.intel.com>,
Rick Edgecombe <rick.p.edgecombe@...el.com>,
linux-mm@...ck.org, linux-kernel@...r.kernel.org,
Joerg Roedel <joro@...tes.org>
Subject: Re: [PATCHv8 00/11] Linear Address Masking enabling
On 9/20/22 06:14, Jason Gunthorpe wrote:
> For this I would rather have a function that queries the format of the
> page table under the mm_struct and we have enum values like
> INTEL_NORMAL and INTEL_LAM as possible values.
>
> The iommu driver will block incompatible page table formats, and when
> it starts up it should assert something that blocks changing the
> format.
That doesn't sound too bad. Except, please don't call it a "page table
format". The format of the page tables does not change with LAM. It's
entirely how the CPU interprets addresses that changes.
I guess someone could make an argument that, with LAM, there is a "hole"
that can't be filled in and _that_ constitutes a format change, but
that'd be a stretch.
The thing that matters when LAM is on is that some CPU might be stashing
addresses somewhere that only have meaning when you interpret them with
LAM rules. That's really a property of the mm, not of the page tables.
Oh, and please don't call things "INTEL_WHATEVER". It looks silly and
confuses the heck out of people when a second CPU vendor needs to use
the same code.
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