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Message-ID: <OS0PR01MB5922AFDAFE3DEBBFFF875875864C9@OS0PR01MB5922.jpnprd01.prod.outlook.com>
Date: Tue, 20 Sep 2022 19:21:46 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: Prabhakar <prabhakar.csengg@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Conor Dooley <conor.dooley@...rochip.com>
CC: Heiko Stuebner <heiko@...ech.de>,
Heinrich Schuchardt <heinrich.schuchardt@...onical.com>,
Atish Patra <atishp@...osinc.com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
"linux-renesas-soc@...r.kernel.org"
<linux-renesas-soc@...r.kernel.org>,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: RE: [PATCH v4 07/10] riscv: dts: r9a07g043: Add placeholder nodes
Hi Prabhakar,
Thanks for the patch.
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> Add empty placeholder nodes to RZ/Five (R9A07G043) SoC DTSI.
>
> This is in preparation to reuse the RZ/G2UL SMARC SoM and carrier
> board DTSIs([0] and [1]).
Just a question,
Why can't we reuse SoC dtsi as well, as 90% of the SoC nodes are same?
Split common stuff from arch/arm/boot/dts/renesas/r9a07g043.dtsi
and add ARM specific CPU, IRQ to arch/arm/boot/dts/renesas/r9a07g043u.dtsi
RISC-V specific CPU, IRQ to arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
Both r9a07g043{u,f} dtsi will add common dtsi.
Cheers,
Biju
>
> As the RZ/G2UL SMARC EVK enables almost all the blocks supported by
> the SoC and whereas for the RZ/Five SMARC EVK we will gradually be
> enabling the blocks as a result we are adding the placeholder nodes to
> avoid DTB compilation errors (currently we dont have support in DTC to
> delete the reference nodes without actual nodes).
>
> [0] arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
> [1] arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> ---
> v3 -> v4
> * Dropped status and reg-names properties
> * Updated the commit message
> * Note sbc node is not enabled in RZ/G2UL SMARC EVK but will be soon
> enabled so added a placeholder for this too.
>
> v2 -> v3
> * New patch
> ---
> arch/riscv/boot/dts/renesas/r9a07g043.dtsi | 150
> +++++++++++++++++++++
> 1 file changed, 150 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/renesas/r9a07g043.dtsi
> b/arch/riscv/boot/dts/renesas/r9a07g043.dtsi
> index fb6733f3cc2b..d90d263b1b13 100644
> --- a/arch/riscv/boot/dts/renesas/r9a07g043.dtsi
> +++ b/arch/riscv/boot/dts/renesas/r9a07g043.dtsi
> @@ -13,6 +13,14 @@ / {
> #address-cells = <2>;
> #size-cells = <2>;
>
> + audio_clk1: audio1-clk {
> + /* placeholder */
> + };
> +
> + audio_clk2: audio2-clk {
> + /* placeholder */
> + };
> +
> cpus {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -54,6 +62,19 @@ soc: soc {
> #size-cells = <2>;
> ranges;
>
> + ssi1: ssi@...4a000 {
> + reg = <0 0x1004a000 0 0x400>;
> + #sound-dai-cells = <0>;
> +
> + /* placeholder */
> + };
> +
> + spi1: spi@...4b000 {
> + reg = <0 0x1004b000 0 0x400>;
> +
> + /* placeholder */
> + };
> +
> scif0: serial@...4b800 {
> compatible = "renesas,scif-r9a07g043",
> "renesas,scif-r9a07g044";
> @@ -73,6 +94,41 @@ scif0: serial@...4b800 {
> status = "disabled";
> };
>
> + canfd: can@...50000 {
> + reg = <0 0x10050000 0 0x8000>;
> +
> + /* placeholder */
> + };
> +
> + i2c0: i2c@...58000 {
> + reg = <0 0x10058000 0 0x400>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + /* placeholder */
> + };
> +
> + i2c1: i2c@...58400 {
> + reg = <0 0x10058400 0 0x400>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* placeholder */
> + };
> +
> + adc: adc@...59000 {
> + reg = <0 0x10059000 0 0x400>;
> +
> + /* placeholder */
> + };
> +
> + sbc: spi@...60000 {
> + reg = <0 0x10060000 0 0x10000>,
> + <0 0x20000000 0 0x10000000>,
> + <0 0x10070000 0 0x10000>;
> +
> + /* placeholder */
> + };
> +
> cpg: clock-controller@...10000 {
> compatible = "renesas,r9a07g043-cpg";
> reg = <0 0x11010000 0 0x10000>;
> @@ -104,6 +160,82 @@ pinctrl: pinctrl@...30000 {
> <&cpg R9A07G043_GPIO_SPARE_RESETN>;
> };
>
> + sdhi0: mmc@...00000 {
> + reg = <0x0 0x11c00000 0 0x10000>;
> +
> + /* placeholder */
> + };
> +
> + sdhi1: mmc@...10000 {
> + reg = <0x0 0x11c10000 0 0x10000>;
> +
> + /* placeholder */
> + };
> +
> + eth0: ethernet@...20000 {
> + reg = <0 0x11c20000 0 0x10000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* placeholder */
> + };
> +
> + eth1: ethernet@...30000 {
> + reg = <0 0x11c30000 0 0x10000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* placeholder */
> + };
> +
> + phyrst: usbphy-ctrl@...40000 {
> + reg = <0 0x11c40000 0 0x10000>;
> +
> + /* placeholder */
> + };
> +
> + ohci0: usb@...50000 {
> + reg = <0 0x11c50000 0 0x100>;
> +
> + /* placeholder */
> + };
> +
> + ohci1: usb@...70000 {
> + reg = <0 0x11c70000 0 0x100>;
> +
> + /* placeholder */
> + };
> +
> + ehci0: usb@...50100 {
> + reg = <0 0x11c50100 0 0x100>;
> +
> + /* placeholder */
> + };
> +
> + ehci1: usb@...70100 {
> + reg = <0 0x11c70100 0 0x100>;
> +
> + /* placeholder */
> + };
> +
> + usb2_phy0: usb-phy@...50200 {
> + reg = <0 0x11c50200 0 0x700>;
> +
> + /* placeholder */
> + };
> +
> + usb2_phy1: usb-phy@...70200 {
> + reg = <0 0x11c70200 0 0x700>;
> +
> + /* placeholder */
> + };
> +
> + hsusb: usb@...60000 {
> + reg = <0 0x11c60000 0 0x10000>;
> +
> + /* placeholder */
> + };
> +
> plic: interrupt-controller@...00000 {
> compatible = "renesas,r9a07g043-plic",
> "andestech,nceplic100";
> #interrupt-cells = <2>;
> @@ -116,5 +248,23 @@ plic: interrupt-controller@...00000 {
> resets = <&cpg R9A07G043_NCEPLIC_ARESETN>;
> interrupts-extended = <&cpu0_intc 11 &cpu0_intc 9>;
> };
> +
> + wdt0: watchdog@...00800 {
> + reg = <0 0x12800800 0 0x400>;
> +
> + /* placeholder */
> + };
> +
> + ostm1: timer@...01400 {
> + reg = <0x0 0x12801400 0x0 0x400>;
> +
> + /* placeholder */
> + };
> +
> + ostm2: timer@...01800 {
> + reg = <0x0 0x12801800 0x0 0x400>;
> +
> + /* placeholder */
> + };
> };
> };
> --
> 2.25.1
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