[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <BN9PR11MB5276C0D13C6AED74242453F98C4C9@BN9PR11MB5276.namprd11.prod.outlook.com>
Date: Tue, 20 Sep 2022 07:51:42 +0000
From: "Tian, Kevin" <kevin.tian@...el.com>
To: Lu Baolu <baolu.lu@...ux.intel.com>,
"iommu@...ts.linux.dev" <iommu@...ts.linux.dev>
CC: Joerg Roedel <joro@...tes.org>, Will Deacon <will@...nel.org>,
"Robin Murphy" <robin.murphy@....com>,
Jacob Pan <jacob.jun.pan@...ux.intel.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 2/2] iommu/vt-d: Avoid unnecessary global DMA cache
invalidation
> From: Lu Baolu <baolu.lu@...ux.intel.com>
> Sent: Monday, September 19, 2022 2:25 PM
>
> Some VT-d hardware implementations invalidate all DMA remapping
> hardware
> translation caches as part of SRTP flow. The VT-d spec adds a ESRTPS
> (Enhanced Set Root Table Pointer Support, section 11.4.2 in VT-d spec)
> capability bit to indicate this. With this bit set, software has no need
> to issue the global invalidation request.
>
> Signed-off-by: Lu Baolu <baolu.lu@...ux.intel.com>
Reviewed-by: Kevin Tian <kevin.tian@...el.com>
Powered by blists - more mailing lists