[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20220920114051.1116441-5-bhupesh.sharma@linaro.org>
Date: Tue, 20 Sep 2022 17:10:46 +0530
From: Bhupesh Sharma <bhupesh.sharma@...aro.org>
To: linux-crypto@...r.kernel.org, devicetree@...r.kernel.org
Cc: agross@...nel.org, herbert@...dor.apana.org.au,
linux-kernel@...r.kernel.org, robh+dt@...nel.org,
linux-arm-msm@...r.kernel.org, thara.gopinath@...il.com,
robh@...nel.org, krzysztof.kozlowski@...aro.org,
andersson@...nel.org, bhupesh.sharma@...aro.org,
bhupesh.linux@...il.com, davem@...emloft.net,
Jordan Crouse <jorcrous@...zon.com>
Subject: [PATCH v7 4/9] dt-bindings: qcom-qce: Add new SoC compatible strings for qcom-qce
Newer Qualcomm chips support newer versions of the qce crypto IP, so add
soc specific compatible strings for qcom-qce instead of using crypto
IP version specific ones.
Keep the old strings for backward-compatibility, but mark them as
deprecated.
Cc: Bjorn Andersson <andersson@...nel.org>
Reviewed-by: Rob Herring <robh@...nel.org>
Tested-by: Jordan Crouse <jorcrous@...zon.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...aro.org>
---
.../devicetree/bindings/crypto/qcom-qce.yaml | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
index 4e00e7925fed..aa2f676f5382 100644
--- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
@@ -15,7 +15,15 @@ description:
properties:
compatible:
- const: qcom,crypto-v5.1
+ enum:
+ - qcom,crypto-v5.1 # Deprecated. Kept only for backward compatibility
+ - qcom,ipq6018-qce
+ - qcom,ipq8074-qce
+ - qcom,msm8996-qce
+ - qcom,sdm845-qce
+ - qcom,sm8150-qce
+ - qcom,sm8250-qce
+ - qcom,sm8350-qce
reg:
maxItems: 1
@@ -70,7 +78,7 @@ examples:
- |
#include <dt-bindings/clock/qcom,gcc-apq8084.h>
crypto-engine@...5a000 {
- compatible = "qcom,crypto-v5.1";
+ compatible = "qcom,ipq6018-qce";
reg = <0xfd45a000 0x6000>;
clocks = <&gcc GCC_CE2_AHB_CLK>,
<&gcc GCC_CE2_AXI_CLK>,
--
2.37.1
Powered by blists - more mailing lists