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Message-ID: <MN0PR12MB5953774B25AB9CA40A8BB43EB74C9@MN0PR12MB5953.namprd12.prod.outlook.com>
Date:   Tue, 20 Sep 2022 12:00:02 +0000
From:   "Pandey, Radhey Shyam" <radhey.shyam.pandey@....com>
To:     Vinod Koul <vkoul@...nel.org>,
        "Gaddam, Sarath Babu Naidu" <sarath.babu.naidu.gaddam@....com>
CC:     "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "lars@...afoo.de" <lars@...afoo.de>,
        "adrianml@...mnos.upm.es" <adrianml@...mnos.upm.es>,
        "dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Simek, Michal" <michal.simek@....com>,
        "Sarangi, Anirudha" <anirudha.sarangi@....com>,
        "Katakam, Harini" <harini.katakam@....com>,
        "git@...inx.com" <git@...inx.com>, "git (AMD-Xilinx)" <git@....com>
Subject: RE: [RFC V3 PATCH 0/8] Xilinx DMA enhancements and optimization

> -----Original Message-----
> From: Vinod Koul <vkoul@...nel.org>
> Sent: Tuesday, September 20, 2022 4:57 PM
> To: Gaddam, Sarath Babu Naidu <sarath.babu.naidu.gaddam@....com>
> Cc: robh+dt@...nel.org; krzysztof.kozlowski+dt@...aro.org;
> lars@...afoo.de; adrianml@...mnos.upm.es; dmaengine@...r.kernel.org;
> devicetree@...r.kernel.org; linux-arm-kernel@...ts.infradead.org; linux-
> kernel@...r.kernel.org; Simek, Michal <michal.simek@....com>; Pandey,
> Radhey Shyam <radhey.shyam.pandey@....com>; Sarangi, Anirudha
> <anirudha.sarangi@....com>; Katakam, Harini
> <harini.katakam@....com>; git@...inx.com; git (AMD-Xilinx)
> <git@....com>
> Subject: Re: [RFC V3 PATCH 0/8] Xilinx DMA enhancements and optimization
> 
> On 20-09-22, 11:21, Sarath Babu Naidu Gaddam wrote:
> > Some background about the patch series: Xilinx Axi Ethernet device
> > driver
> > (xilinx_axienet_main.c) currently has axi-dma code inside it. The goal
> > is to refactor axiethernet driver and use existing AXI DMA driver
> > using DMAEngine API.
> >
> > This patchset does feature addition and optimization to support axidma
> > integration with axiethernet network driver. Once axidma version is
> > accepted mcdma specific changes will be added in followup version.
> 
> why is this tagged RFC? Is it not ready for merge?

To recap - In v3, the new addition is "[PATCH 8/8] dmaengine: 
xilinx_dma: Add device_config support" along with addressing 
RFC v2 comment. 

8/8 is initial proposal on how to implement coalesce feature in
dmaengine driver to support ethernet usecases. Thought was
that it's better to have this idea reviewed as RFC before 
extending the logic for other IP variants and spin sanity test
all usecases. 

Fallback option is to split this series and send patches which are
already reviewed in RFC v2 as PATCH and only 8/8 (which need 
more discussion/framework extension) as RFC?
Let me know your thoughts. 

Thanks,
Radhey
> 
> >
> > Changes for V2:
> > - Use metadata API[1] for passing metadata from dma to netdev client.
> > - Read irq-delay from DT.
> > - Remove desc_callback_valid check.
> > - Addressed RFC v1 comments[2].
> > - Minor code refactoring.
> >
> > Changes for V3:
> > - Add device_config support for passing any dma client data.
> > - Address RFC v2 comments.
> >     - remove hardcoding for axidma_tx_segment.
> >     - Below review comment is in pipeline. We are facing a race issue when
> >       addressing it. we will fix it in the next version.
> >       "chan->idle = true; in xilinx_dma_irq_handler() needs to be gated on
> >        the active_list being empty".
> >
> > Comments, suggestions are very welcome
> >
> > Radhey Shyam Pandey (7):
> >   dt-bindings: dmaengine: xilinx_dma: Add xlnx,axistream-connected
> >     property
> >   dt-bindings: dmaengine: xilinx_dma: Add xlnx,irq-delay property
> >   dmaengine: xilinx_dma: Pass AXI4-Stream control words to dma client
> >   dmaengine: xilinx_dma: Increase AXI DMA transaction segment count
> >   dmaengine: xilinx_dma: Freeup active list based on descriptor
> >     completion bit
> >   dmaengine: xilinx_dma: Use tasklet_hi_schedule for timing critical
> >     usecase
> >   dmaengine: xilinx_dma: Program interrupt delay timeout
> >
> > Sarath Babu Naidu Gaddam (1):
> >   dmaengine: xilinx_dma: Add device_config support
> >
> >  .../bindings/dma/xilinx/xilinx_dma.txt        |   4 +
> >  drivers/dma/xilinx/xilinx_dma.c               | 107 ++++++++++++++++--
> >  include/linux/dma/xilinx_dma.h                |  16 +++
> >  3 files changed, 115 insertions(+), 12 deletions(-)
> >
> > --
> > 2.25.1
> 
> --
> ~Vinod

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