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Message-ID: <YytT1hfRZdb9GYQK@nvidia.com>
Date: Wed, 21 Sep 2022 15:11:34 -0300
From: Jason Gunthorpe <jgg@...dia.com>
To: Dave Hansen <dave.hansen@...el.com>
Cc: Ashok Raj <ashok.raj@...el.com>,
"Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
Jacob Pan <jacob.jun.pan@...el.com>,
"Kirill A. Shutemov" <kirill@...temov.name>,
Ashok Raj <ashok_raj@...ux.intel.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Andy Lutomirski <luto@...nel.org>,
Peter Zijlstra <peterz@...radead.org>, x86@...nel.org,
Kostya Serebryany <kcc@...gle.com>,
Andrey Ryabinin <ryabinin.a.a@...il.com>,
Andrey Konovalov <andreyknvl@...il.com>,
Alexander Potapenko <glider@...gle.com>,
Taras Madan <tarasmadan@...gle.com>,
Dmitry Vyukov <dvyukov@...gle.com>,
"H . J . Lu" <hjl.tools@...il.com>,
Andi Kleen <ak@...ux.intel.com>,
Rick Edgecombe <rick.p.edgecombe@...el.com>,
linux-mm@...ck.org, linux-kernel@...r.kernel.org,
Joerg Roedel <joro@...tes.org>
Subject: Re: [PATCHv8 00/11] Linear Address Masking enabling
On Wed, Sep 21, 2022 at 10:11:46AM -0700, Dave Hansen wrote:
> Are you saying that any device compatibility with an mm is solely
> determined by the IOMMU in play, so the IOMMU code should host the mm
> compatibility checks?
Yes, exactly. Only the HW entity that walks the page tables needs to
understand their parsing rules and in this case that is only the IOMMU
block.
Jason
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