linux-kernel - Re: (subset) [PATCH v2 02/15] dt-bindings: memory: snps: Extend schema with IRQs/resets/clocks props

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <166378533309.18832.8073645732601460899.b4-ty@linaro.org>
Date:   Wed, 21 Sep 2022 20:35:35 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     robh+dt@...nel.org, Tony Luck <tony.luck@...el.com>,
        krzysztof.kozlowski+dt@...aro.org, manish.narani@...inx.com,
        mchehab@...nel.org, michal.simek@...inx.com,
        Sergey.Semin@...kalelectronics.ru, bp@...en8.de
Cc:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        rric@...nel.org, linux-kernel@...r.kernel.org, krzk@...nel.org,
        linux-edac@...r.kernel.org, Michail.Ivanov@...kalelectronics.ru,
        dinguyen@...nel.org, punnaiah.choudary.kalluri@...inx.com,
        linux-arm-kernel@...ts.infradead.org,
        Pavel.Parkhomenko@...kalelectronics.ru, robh@...nel.org,
        james.morse@....com, Alexey.Malahov@...kalelectronics.ru,
        devicetree@...r.kernel.org, fancer.lancer@...il.com
Subject: Re: (subset) [PATCH v2 02/15] dt-bindings: memory: snps: Extend schema with IRQs/resets/clocks props

On Sat, 10 Sep 2022 22:56:46 +0300, Serge Semin wrote:
> First of all the DW uMCTL2 DDRC IP-core supports the individual IRQ lines
> for each standard event: ECC Corrected Error, ECC Uncorrected Error, ECC
> Address Protection, Scrubber-Done signal, DFI Parity/CRC Error. It's
> possible that the platform engineers merge them up in the IRQ controller
> level. So let's add both configuration support to the DT-schema.
> 
> Secondly the DW uMCTL2 DDRC IP-core can have clock sources like APB
> reference clock, AXI-ports clock, main DDRC core reference clock and
> Scrubber low-power clock. In addition to that each clock domain can have a
> dedicated reset signal. Let's add the properties for at least the denoted
> clock sources and the corresponding reset controls.
> 
> [...]

Applied, thanks!

[02/15] dt-bindings: memory: snps: Extend schema with IRQs/resets/clocks props
        https://git.kernel.org/krzk/linux-mem-ctrl/c/5514acb0dd030356e628cdd88b266efaa0a22315

Best regards,
-- 
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>