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Date:   Wed, 21 Sep 2022 12:09:55 +0800
From:   kernel test robot <lkp@...el.com>
To:     George Shen <george.shen@....com>
Cc:     kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org,
        Alex Deucher <alexander.deucher@....com>,
        Alvin Lee <alvin.lee2@....com>,
        Nevenko Stupar <Nevenko.Stupar@....com>,
        linux-doc@...r.kernel.org
Subject: [agd5f:drm-next 131/170]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:247: warning:
 This comment starts with '/**', but isn't a kernel-doc comment. Refer
 Documentation/doc-guide/kernel-doc.rst

tree:   https://gitlab.freedesktop.org/agd5f/linux.git drm-next
head:   48c35c428c7feb06761dbc398139eb7e697c6608
commit: f57da8c04f183f90cd450a5d5142109fba340417 [131/170] drm/amd/display: Update dummy P-state search to use DCN32 DML
config: x86_64-allyesconfig (https://download.01.org/0day-ci/archive/20220921/202209211226.co3Q4sTH-lkp@intel.com/config)
compiler: gcc-11 (Debian 11.3.0-5) 11.3.0
reproduce (this is a W=1 build):
        git remote add agd5f https://gitlab.freedesktop.org/agd5f/linux.git
        git fetch --no-tags agd5f drm-next
        git checkout f57da8c04f183f90cd450a5d5142109fba340417
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@...el.com>

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:247: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
    * Finds dummy_latency_index when MCLK switching using firmware based
   drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:334: warning: Cannot understand  * *******************************************************************************************
    on line 334 - I thought it was a doc line
   drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:535: warning: Function parameter or member 'phantom_stream' not described in 'dcn32_set_phantom_stream_timing'
   drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:652: warning: Function parameter or member 'dc' not described in 'dcn32_assign_subvp_pipe'
   drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:652: warning: Function parameter or member 'context' not described in 'dcn32_assign_subvp_pipe'
   drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:652: warning: Function parameter or member 'index' not described in 'dcn32_assign_subvp_pipe'
   drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:2221: warning: Function parameter or member 'dc' not described in 'dcn32_update_bw_bounding_box_fpu'
   drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:2221: warning: Function parameter or member 'bw_params' not described in 'dcn32_update_bw_bounding_box_fpu'
   drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:2221: warning: expecting prototype for dcn32_update_bw_bounding_box(). Prototype was for dcn32_update_bw_bounding_box_fpu() instead


vim +247 drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c

   245	
   246	/**
 > 247	 * Finds dummy_latency_index when MCLK switching using firmware based
   248	 * vblank stretch is enabled. This function will iterate through the
   249	 * table of dummy pstate latencies until the lowest value that allows
   250	 * dm_allow_self_refresh_and_mclk_switch to happen is found
   251	 */
   252	int dcn32_find_dummy_latency_index_for_fw_based_mclk_switch(struct dc *dc,
   253								    struct dc_state *context,
   254								    display_e2e_pipe_params_st *pipes,
   255								    int pipe_cnt,
   256								    int vlevel)
   257	{
   258		const int max_latency_table_entries = 4;
   259		const struct vba_vars_st *vba = &context->bw_ctx.dml.vba;
   260		int dummy_latency_index = 0;
   261	
   262		dc_assert_fp_enabled();
   263	
   264		while (dummy_latency_index < max_latency_table_entries) {
   265			context->bw_ctx.dml.soc.dram_clock_change_latency_us =
   266					dc->clk_mgr->bw_params->dummy_pstate_table[dummy_latency_index].dummy_pstate_latency_us;
   267			dcn32_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, false);
   268	
   269			if (vlevel < context->bw_ctx.dml.vba.soc.num_states &&
   270					vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] != dm_dram_clock_change_unsupported)
   271				break;
   272	
   273			dummy_latency_index++;
   274		}
   275	
   276		if (dummy_latency_index == max_latency_table_entries) {
   277			ASSERT(dummy_latency_index != max_latency_table_entries);
   278			/* If the execution gets here, it means dummy p_states are
   279			 * not possible. This should never happen and would mean
   280			 * something is severely wrong.
   281			 * Here we reset dummy_latency_index to 3, because it is
   282			 * better to have underflows than system crashes.
   283			 */
   284			dummy_latency_index = max_latency_table_entries - 1;
   285		}
   286	
   287		return dummy_latency_index;
   288	}
   289	

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp

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