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Message-Id: <20220921045602.1462007-2-bhupesh.sharma@linaro.org>
Date: Wed, 21 Sep 2022 10:25:59 +0530
From: Bhupesh Sharma <bhupesh.sharma@...aro.org>
To: linux-arm-kernel@...ts.infradead.org, linux-arm-msm@...r.kernel.org
Cc: agross@...nel.org, linux-kernel@...r.kernel.org,
robh+dt@...nel.org, thara.gopinath@...il.com,
devicetree@...r.kernel.org, robh@...nel.org,
krzysztof.kozlowski@...aro.org, andersson@...nel.org,
bhupesh.sharma@...aro.org, bhupesh.linux@...il.com,
catalin.marinas@....com, will@...nel.org, arnd@...db.de
Subject: [PATCH v7 1/4] ARM: dts: qcom: Use new compatibles for crypto nodes
Since we are using soc specific qce crypto IP compatibles
in the bindings now, use the same in the device tree files
which include the crypto nodes.
Cc: Bjorn Andersson <andersson@...nel.org>
Cc: Rob Herring <robh@...nel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...aro.org>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +-
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +-
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 +-
arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index b23591110bd2..9c40714562d5 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -314,7 +314,7 @@ cryptobam: dma-controller@...4000 {
};
crypto: crypto@...a000 {
- compatible = "qcom,crypto-v5.1";
+ compatible = "qcom,ipq4019-qce";
reg = <0x08e3a000 0x6000>;
clocks = <&gcc GCC_CRYPTO_AHB_CLK>,
<&gcc GCC_CRYPTO_AXI_CLK>,
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index a7c7ca980a71..0ae3c601b279 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -198,7 +198,7 @@ cryptobam: dma-controller@...000 {
};
crypto: crypto@...000 {
- compatible = "qcom,crypto-v5.1";
+ compatible = "qcom,ipq6018-qce";
reg = <0x0 0x0073a000 0x0 0x6000>;
clocks = <&gcc GCC_CRYPTO_AHB_CLK>,
<&gcc GCC_CRYPTO_AXI_CLK>,
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index a47acf9bdf24..0683ef931413 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -286,7 +286,7 @@ cryptobam: dma-controller@...000 {
};
crypto: crypto@...000 {
- compatible = "qcom,crypto-v5.1";
+ compatible = "qcom,ipq8074-qce";
reg = <0x0073a000 0x6000>;
clocks = <&gcc GCC_CRYPTO_AHB_CLK>,
<&gcc GCC_CRYPTO_AXI_CLK>,
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index c0a2baffa49d..0dd6e1fea99c 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -755,7 +755,7 @@ cryptobam: dma-controller@...000 {
};
crypto: crypto@...000 {
- compatible = "qcom,crypto-v5.4";
+ compatible = "qcom,msm8996-qce";
reg = <0x0067a000 0x6000>;
clocks = <&gcc GCC_CE1_AHB_CLK>,
<&gcc GCC_CE1_AXI_CLK>,
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index d761da47220d..4aa5a82bd265 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -2566,7 +2566,7 @@ cryptobam: dma-controller@...4000 {
};
crypto: crypto@...a000 {
- compatible = "qcom,crypto-v5.4";
+ compatible = "qcom,sdm845-qce";
reg = <0 0x01dfa000 0 0x6000>;
clocks = <&gcc GCC_CE1_AHB_CLK>,
<&gcc GCC_CE1_AXI_CLK>,
--
2.37.1
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