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Message-ID: <df9ff0bd-ad0e-4b5b-859d-dd913628edc8@linaro.org>
Date: Wed, 21 Sep 2022 11:26:02 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
Cc: Geert Uytterhoeven <geert@...ux-m68k.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Andre Przywara <andre.przywara@....com>,
Conor Dooley <conor.dooley@...rochip.com>,
Samuel Holland <samuel@...lland.org>,
Biju Das <biju.das.jz@...renesas.com>,
Chris Paterson <Chris.Paterson2@...esas.com>,
Atish Patra <atishp@...shpatra.org>,
"Lad, Prabhakar" <prabhakar.mahadev-lad.rj@...renesas.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
linux-riscv <linux-riscv@...ts.infradead.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Arnd Bergmann <arnd@...db.de>, Olof Johansson <olof@...om.net>
Subject: Re: Similar SoCs with different CPUs and interrupt bindings
On 21/09/2022 11:20, Lad, Prabhakar wrote:
>>
>> What do you mean? Macros support string concatenation and simple
>> arithmetic like adding numbers. I just tested it.
>>
> I did try the below:
>
> diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> index 689aa4ba416b..0f923c276cd3 100644
> --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> @@ -8,6 +8,8 @@
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/clock/r9a07g043-cpg.h>
>
> +#define SOC_PERIPHERAL_IRQ(nr, na) GIC_SPI nr na
> +
> / {
> compatible = "renesas,r9a07g043";
> #address-cells = <2>;
> @@ -128,7 +130,7 @@ ssi1: ssi@...4a000 {
> compatible = "renesas,r9a07g043-ssi",
> "renesas,rz-ssi";
> reg = <0 0x1004a000 0 0x400>;
> - interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
> + interrupts = <SOC_PERIPHERAL_IRQ(330, IRQ_TYPE_LEVEL_HIGH)>,
> <GIC_SPI 331 IRQ_TYPE_EDGE_RISING>,
> <GIC_SPI 332 IRQ_TYPE_EDGE_RISING>,
> <GIC_SPI 333 IRQ_TYPE_EDGE_RISING>;
>
> This worked as expected, but couldn't get the arithmetic operation
> working. Could you please provide an example?
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
index ff6aab388eb7..0ecca775fa3f 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
@@ -8,6 +8,8 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/r9a07g043-cpg.h>
+#define SOC_PERIPHERAL_IRQ_NUMBER(na) (na + 32)
+#define SOC_PERIPHERAL_IRQ(nr, na) GIC_SPI nr SOC_PERIPHERAL_IRQ_NUMBER(na)
/ {
compatible = "renesas,r9a07g043";
#address-cells = <2>;
@@ -128,7 +130,7 @@ ssi1: ssi@...4a000 {
compatible = "renesas,r9a07g043-ssi",
"renesas,rz-ssi";
reg = <0 0x1004a000 0 0x400>;
- interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts = <SOC_PERIPHERAL_IRQ(330, IRQ_TYPE_LEVEL_HIGH)>,
Or any other method like that....
Best regards,
Krzysztof
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