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Message-ID: <921a1da6-e378-2632-7b68-ac59e3c24f68@amd.com>
Date:   Wed, 21 Sep 2022 08:15:07 -0700
From:   Lizhi Hou <lizhi.hou@....com>
To:     Martin Tůma <tumic@...see.org>
CC:     <dmaengine@...r.kernel.org>, <linux-i2c@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-media@...r.kernel.org>,
        <martin.tuma@...iteqautomotive.com>, <mchehab@...nel.org>,
        <michal.simek@...inx.com>, <vkoul@...nel.org>
Subject: Re: [PATCH v2 2/3] Added Xilinx XDMA IP core driver


On 9/21/22 02:25, Martin Tůma wrote:
> > Currently, the V3 patch series does not support register user logic
> > interrupt yet.
>
> This is a showstopper for almost every XDMA based PCIe card. As the 
> driver "consumes" the whole register space (including the user IRQs 
> enable/disable registers), there is AFAIK no way how to enable the 
> user IRQs when this driver is loaded.
>
> > Could you convert your driver to use this?
>
> Not without the user IRQs.

I provided the patch link for user logic IRQ support in previous reply. 
You may pull it and patch it on top of the V3 patch series.


Lizhi

>
> M.

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