lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Thu, 22 Sep 2022 10:07:46 -0700 (PDT) From: Palmer Dabbelt <palmer@...belt.com> To: anup@...infault.org CC: rafael@...nel.org, daniel.lezcano@...aro.org, Paul Walmsley <paul.walmsley@...ive.com>, ulf.hansson@...aro.org, atishp@...shpatra.org, Alistair Francis <Alistair.Francis@....com>, linux-pm@...r.kernel.org, linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org, apatel@...tanamicro.com Subject: Re: [PATCH] cpuidle: riscv-sbi: Fix CPU_PM_CPU_IDLE_ENTER_xyz() macro usage On Sun, 28 Aug 2022 19:59:45 PDT (-0700), anup@...infault.org wrote: > Hi Palmer, > > On Mon, Jul 18, 2022 at 2:16 PM Anup Patel <apatel@...tanamicro.com> wrote: >> >> Currently, we are using CPU_PM_CPU_IDLE_ENTER_PARAM() for all SBI HSM >> suspend types so retentive suspend types are also treated non-retentive >> and kernel will do redundant additional work for these states. >> >> The BIT[31] of SBI HSM suspend types allows us to differentiate between >> retentive and non-retentive suspend types so we should use this BIT >> to call appropriate CPU_PM_CPU_IDLE_ENTER_xyz() macro. >> >> Fixes: 6abf32f1d9c5 ("cpuidle: Add RISC-V SBI CPU idle driver") >> Signed-off-by: Anup Patel <apatel@...tanamicro.com> > > Can you please take this patch through the RISC-V tree ? Sorry I missed this, I didn't realize you wanted me to merge it. It's on fixes. > > Regards, > Anup > >> --- >> drivers/cpuidle/cpuidle-riscv-sbi.c | 7 ++++++- >> 1 file changed, 6 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/cpuidle/cpuidle-riscv-sbi.c b/drivers/cpuidle/cpuidle-riscv-sbi.c >> index 1151e5e2ba82..33c92fec4365 100644 >> --- a/drivers/cpuidle/cpuidle-riscv-sbi.c >> +++ b/drivers/cpuidle/cpuidle-riscv-sbi.c >> @@ -97,8 +97,13 @@ static int sbi_cpuidle_enter_state(struct cpuidle_device *dev, >> struct cpuidle_driver *drv, int idx) >> { >> u32 *states = __this_cpu_read(sbi_cpuidle_data.states); >> + u32 state = states[idx]; >> >> - return CPU_PM_CPU_IDLE_ENTER_PARAM(sbi_suspend, idx, states[idx]); >> + if (state & SBI_HSM_SUSP_NON_RET_BIT) >> + return CPU_PM_CPU_IDLE_ENTER_PARAM(sbi_suspend, idx, state); >> + else >> + return CPU_PM_CPU_IDLE_ENTER_RETENTION_PARAM(sbi_suspend, >> + idx, state); >> } >> >> static int __sbi_enter_domain_idle_state(struct cpuidle_device *dev, >> -- >> 2.34.1 >>
Powered by blists - more mailing lists