lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20220922113347.144383-7-sergiu.moga@microchip.com>
Date:   Thu, 22 Sep 2022 14:33:44 +0300
From:   Sergiu Moga <sergiu.moga@...rochip.com>
To:     <lee@...nel.org>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <nicolas.ferre@...rochip.com>,
        <alexandre.belloni@...tlin.com>, <claudiu.beznea@...rochip.com>,
        <radu_nicolae.pirea@....ro>, <richard.genoud@...il.com>,
        <gregkh@...uxfoundation.org>, <jirislaby@...nel.org>,
        <kavyasree.kotagiri@...rochip.com>
CC:     <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <linux-spi@...r.kernel.org>,
        <linux-serial@...r.kernel.org>,
        Sergiu Moga <sergiu.moga@...rochip.com>
Subject: [PATCH v5 6/9] tty: serial: atmel: Separate mode clearing between UART and USART

When clearing the mode of the serial IP inside the atmel_set_termios()
method, make sure that the difference between the bitfields placement
of the UART IP's and USART IP's is taken into account, as some of
them overlap with each other. For example, ATMEL_UA_BRSRCCK overlaps
with ATMEL_US_NBSTOP and ATMEL_US_USCLKS overlaps with ATMEL_UA_FILTER.

Furthermore, add definitions for the Baud Rate Source Clock and the
Filter bitfields of the Mode Register of UART IP's, since they were
missing.

Signed-off-by: Sergiu Moga <sergiu.moga@...rochip.com>
---


v1 -> v5:
- This patch was not here before but it also includes the previous patch:
`[PATCH v4 7/9] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register`
squashed into it and define BRSRCCK as a bitfield instead of a bitmask,
since it is only 1 bit.



 drivers/tty/serial/atmel_serial.c | 7 +++++--
 drivers/tty/serial/atmel_serial.h | 2 ++
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index ab4a9dfae07d..e3e14cb7668b 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -2134,8 +2134,11 @@ static void atmel_set_termios(struct uart_port *port,
 	mode = old_mode = atmel_uart_readl(port, ATMEL_US_MR);
 
 	/* reset the mode, clock divisor, parity, stop bits and data size */
-	mode &= ~(ATMEL_US_USCLKS | ATMEL_US_CHRL | ATMEL_US_NBSTOP |
-		  ATMEL_US_PAR | ATMEL_US_USMODE);
+	if (atmel_port->is_usart)
+		mode &= ~(ATMEL_US_NBSTOP | ATMEL_US_PAR | ATMEL_US_CHRL |
+			  ATMEL_US_USCLKS | ATMEL_US_USMODE);
+	else
+		mode &= ~(ATMEL_UA_BRSRCCK | ATMEL_US_PAR | ATMEL_UA_FILTER);
 
 	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
 
diff --git a/drivers/tty/serial/atmel_serial.h b/drivers/tty/serial/atmel_serial.h
index 0d8a0f9cc5c3..2a525b58e11a 100644
--- a/drivers/tty/serial/atmel_serial.h
+++ b/drivers/tty/serial/atmel_serial.h
@@ -50,6 +50,7 @@
 #define		ATMEL_US_USCLKS_MCK		(0 <<  4)
 #define		ATMEL_US_USCLKS_MCK_DIV8	(1 <<  4)
 #define		ATMEL_US_USCLKS_SCK		(3 <<  4)
+#define	ATMEL_UA_FILTER		BIT(4)
 #define	ATMEL_US_CHRL		GENMASK(7, 6)	/* Character Length */
 #define		ATMEL_US_CHRL_5			(0 <<  6)
 #define		ATMEL_US_CHRL_6			(1 <<  6)
@@ -67,6 +68,7 @@
 #define		ATMEL_US_NBSTOP_1		(0 << 12)
 #define		ATMEL_US_NBSTOP_1_5		(1 << 12)
 #define		ATMEL_US_NBSTOP_2		(2 << 12)
+#define	ATMEL_UA_BRSRCCK	BIT(12)	/* Clock Selection for UART */
 #define	ATMEL_US_CHMODE		GENMASK(15, 14)	/* Channel Mode */
 #define		ATMEL_US_CHMODE_NORMAL		(0 << 14)
 #define		ATMEL_US_CHMODE_ECHO		(1 << 14)
-- 
2.34.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ