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Message-ID: <Yy3ib21g/7QlLn0W@nvidia.com>
Date: Fri, 23 Sep 2022 13:44:31 -0300
From: Jason Gunthorpe <jgg@...dia.com>
To: Dave Hansen <dave.hansen@...el.com>
Cc: Ashok Raj <ashok.raj@...el.com>,
"Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
Jacob Pan <jacob.jun.pan@...el.com>,
"Kirill A. Shutemov" <kirill@...temov.name>,
Ashok Raj <ashok_raj@...ux.intel.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Andy Lutomirski <luto@...nel.org>,
Peter Zijlstra <peterz@...radead.org>, x86@...nel.org,
Kostya Serebryany <kcc@...gle.com>,
Andrey Ryabinin <ryabinin.a.a@...il.com>,
Andrey Konovalov <andreyknvl@...il.com>,
Alexander Potapenko <glider@...gle.com>,
Taras Madan <tarasmadan@...gle.com>,
Dmitry Vyukov <dvyukov@...gle.com>,
"H . J . Lu" <hjl.tools@...il.com>,
Andi Kleen <ak@...ux.intel.com>,
Rick Edgecombe <rick.p.edgecombe@...el.com>,
linux-mm@...ck.org, linux-kernel@...r.kernel.org,
Joerg Roedel <joro@...tes.org>
Subject: Re: [PATCHv8 00/11] Linear Address Masking enabling
On Fri, Sep 23, 2022 at 09:23:40AM -0700, Dave Hansen wrote:
> After our private chat, I think the answer is that devices *have* a role
> to play. Device-side logic must know how to untag memory before asking
> for translation or even *deciding* to ask for address translation. But,
> hopefully, the communicating that untagging information to the device
> will be done in a device-agnostic, standardized way, just how PASIDs or
> ATS are handled today.
Right, that would be my hope, we will see what PCI SIG standardizes.
Jason
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