linux-kernel - Re: [PATCH v3 2/2] pinctrl: nuvoton: add NPCM8XX pinctrl and GPIO driver

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Message-ID: <d39b63eb-e994-ac55-ff36-145a22d3c99e@linaro.org>
Date:   Fri, 23 Sep 2022 20:05:19 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Tomer Maimon <tmaimon77@...il.com>, avifishman70@...il.com,
        tali.perry1@...il.com, joel@....id.au, venture@...gle.com,
        yuenn@...gle.com, benjaminfair@...gle.com,
        linus.walleij@...aro.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, j.neuschaefer@....net,
        zhengbin13@...wei.com
Cc:     openbmc@...ts.ozlabs.org, linux-gpio@...r.kernel.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v3 2/2] pinctrl: nuvoton: add NPCM8XX pinctrl and GPIO
 driver

On 21/09/2022 11:50, Tomer Maimon wrote:
> Add pinctrl and GPIO controller driver support to Arbel BMC NPCM8XX SoC.
> 
> Arbel BMC NPCM8XX pinctrl driver based on Poleg NPCM7XX, except the
> pin mux mapping difference the NPCM8XX GPIO supports adjust debounce
> period time.
> 
> Signed-off-by: Tomer Maimon <tmaimon77@...il.com>
> ---
>  drivers/pinctrl/nuvoton/Kconfig           |   14 +
>  drivers/pinctrl/nuvoton/Makefile          |    1 +
>  drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 2485 +++++++++++++++++++++
>  3 files changed, 2500 insertions(+)
>  create mode 100644 drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
> 
> diff --git a/drivers/pinctrl/nuvoton/Kconfig b/drivers/pinctrl/nuvoton/Kconfig
> index 852b0d0eb08e..3a67cdb346ab 100644
> --- a/drivers/pinctrl/nuvoton/Kconfig
> +++ b/drivers/pinctrl/nuvoton/Kconfig
> @@ -31,3 +31,17 @@ config PINCTRL_NPCM7XX
>  	help
>  	  Say Y here to enable pin controller and GPIO support
>  	  for Nuvoton NPCM750/730/715/705 SoCs.
> +
> +config PINCTRL_NPCM8XX
> +	tristate "Pinctrl and GPIO driver for Nuvoton NPCM8XX"
> +	depends on ARCH_NPCM || COMPILE_TEST
> +	select PINMUX
> +	select PINCONF
> +	select GENERIC_PINCONF
> +	select GPIOLIB
> +	select GPIO_GENERIC
> +	select GPIOLIB_IRQCHIP
> +	help
> +	  Say Y or M here to enable pin controller and GPIO support for
> +	  the Nuvoton NPCM8XX SoC. This is strongly recommended when
> +	  building a kernel that will run on this chip.
> \ No newline at end of file

Fix warning.

Best regards,
Krzysztof