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Message-Id: <20220923074943.981127-3-peng.fan@oss.nxp.com>
Date: Fri, 23 Sep 2022 15:49:43 +0800
From: "Peng Fan (OSS)" <peng.fan@....nxp.com>
To: robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
abelvesa@...nel.org, abel.vesa@...aro.org, sboyd@...nel.org
Cc: shawnguo@...nel.org, s.hauer@...gutronix.de, kernel@...gutronix.de,
festevam@...il.com, linux-imx@....com, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, Peng Fan <peng.fan@....com>
Subject: [PATCH V4 2/2] arm64: dts: imx8m: align anatop with bindings
From: Peng Fan <peng.fan@....com>
The CCM ANALOG module is used for generate PLLs, align the node
with DT bindings
Signed-off-by: Peng Fan <peng.fan@....com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 5 +++--
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 6 +++---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 +++---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 5 +++--
4 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index afb90f59c83c..ea5feb04a0b7 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -573,9 +573,10 @@ fec_mac_address: mac-address@90 {
};
};
- anatop: anatop@...60000 {
- compatible = "fsl,imx8mm-anatop", "syscon";
+ anatop: clock-controller@...60000 {
+ compatible = "fsl,imx8mm-anatop";
reg = <0x30360000 0x10000>;
+ #clock-cells = <1>;
};
snvs: snvs@...70000 {
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index cb2836bfbd95..fc86e7337313 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -576,10 +576,10 @@ fec_mac_address: mac-address@90 {
};
};
- anatop: anatop@...60000 {
- compatible = "fsl,imx8mn-anatop", "fsl,imx8mm-anatop",
- "syscon";
+ anatop: clock-controller@...60000 {
+ compatible = "fsl,imx8mn-anatop", "fsl,imx8mm-anatop";
reg = <0x30360000 0x10000>;
+ #clock-cells = <1>;
};
snvs: snvs@...70000 {
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 53493dc7d976..130dec9b23fc 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -441,10 +441,10 @@ eth_mac2: mac-address@96 {
};
};
- anatop: anatop@...60000 {
- compatible = "fsl,imx8mp-anatop", "fsl,imx8mm-anatop",
- "syscon";
+ anatop: clock-controller@...60000 {
+ compatible = "fsl,imx8mp-anatop", "fsl,imx8mm-anatop";
reg = <0x30360000 0x10000>;
+ #clock-cells = <1>;
};
snvs: snvs@...70000 {
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 19eaa523564d..b14dbf2ffb9a 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -605,10 +605,11 @@ fec_mac_address: mac-address@90 {
};
};
- anatop: syscon@...60000 {
- compatible = "fsl,imx8mq-anatop", "syscon";
+ anatop: clock-controller@...60000 {
+ compatible = "fsl,imx8mq-anatop";
reg = <0x30360000 0x10000>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+ #clock-cells = <1>;
};
snvs: snvs@...70000 {
--
2.37.1
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