linux-kernel - RE: [PATCH v2 3/3] dmaengine: tegra: Add support for dma-channel-mask

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Fri, 23 Sep 2022 10:17:56 +0000
From:   Akhil R <akhilrajeev@...dia.com>
To:     Jonathan Hunter <jonathanh@...dia.com>,
        Laxman Dewangan <ldewangan@...dia.com>,
        "vkoul@...nel.org" <vkoul@...nel.org>,
        "thierry.reding@...il.com" <thierry.reding@...il.com>,
        "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
        "dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>,
        "linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v2 3/3] dmaengine: tegra: Add support for dma-channel-mask

> On 19/09/2022 12:25, Akhil R wrote:
> > Add support for dma-channel-mask so that only the specified channels
> > are used. This helps to reserve some channels for the firmware.
> >
> > This was initially achieved by limiting the channel number to 31 in
> > the driver and adjusting the register address to skip channel0 which
> > was reserved for a firmware. Now, with this change, the driver can
> > align more to the actual hardware which has 32 channels.
> >
> > Signed-off-by: Akhil R <akhilrajeev@...dia.com>
> > ---
> >   drivers/dma/tegra186-gpc-dma.c | 37 +++++++++++++++++++++++++++-------
> >   1 file changed, 30 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/dma/tegra186-gpc-dma.c b/drivers/dma/tegra186-gpc-
> dma.c
> > index fa9bda4a2bc6..1d1180db6d4e 100644
> > --- a/drivers/dma/tegra186-gpc-dma.c
> > +++ b/drivers/dma/tegra186-gpc-dma.c
> > @@ -161,7 +161,10 @@
> >   #define TEGRA_GPCDMA_BURST_COMPLETION_TIMEOUT	5000 /* 5
> msec */
> >
> >   /* Channel base address offset from GPCDMA base address */
> > -#define TEGRA_GPCDMA_CHANNEL_BASE_ADD_OFFSET	0x20000
> > +#define TEGRA_GPCDMA_CHANNEL_BASE_ADDR_OFFSET	0x10000
> 
> Why did this value change? There is no mention in the commit message. If
> this was incorrect before, then this needs to be a separate patch and
> tagged with the appropriate fixes tag so that this can be picked up for
> stable.
This is mentioned in the commit message. 

"... and adjusting the register address to skip channel0 ..."

Probably it is not very clear that it directs to this change. Shall I update the
commit message to have a clearer context?

Regards,
Akhil